Silicon Packaging Design Engineer

Intel • Chandler, AZ

9h • Onsite

About The Position

As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of advanced substrate designs, contributing to the creation of cutting-edge technology that fuels Intel's innovation. You will be responsible for the end-to-end development of substrate designs, from concept through tape-out, ensuring optimal performance, cost efficiency, and manufacturability. This position provides an exciting opportunity to work collaboratively with silicon and hardware teams, directly impacting Intel's success in delivering world-class solutions for high-performance applications.

Requirements

• Bachelors with 1+ years of experience or master’s degree with 6 months of experience in Electrical Engineering, Mechanical Engineering, or Material Sciences disciplines.
• 6+ months of experience with the following technical skills: Experience and/or familiarity with microelectronic package or PCB physical layout design and manufacturing process.
• Familiarity with package design tools like Siemens Xpedition, Cadence Allegro Package Design, AutoCAD, or SolidWorks.
• Familiarity with physical layout aspects of substrate design, including custom layouts, floor plans, or schematic layout conversion.

Nice To Haves

• Experience in microelectronic package substrate design, package I/O routing, and/or technology development.
• Familiarity with microelectronic package electrical modeling and simulation tools such as PowerDC, HyperLynx, Q3D, and HFSS.
• Strong analytical ability and problem-solving skills, including debugging and providing creative solutions.
• Experience with package design tools such as Package Layout Automation (PLA) and FIELD.
• Experience with scripting using Python, VB, C, or similar languages.

Responsibilities

• Drive the physical layout and routing of package designs, ensuring alignment with silicon, package, and board performance requirements.
• Perform substrate fit and routing studies to establish design, performance, and cost tradeoffs.
• Define and implement substrate design rules, conducting internal and external reviews to ensure designs meet quality standards.
• Analyze data, resolve Design Rule Checks (DRCs), and optimize package designs for manufacturability and performance.
• Collaborate with cross-functional teams to optimize pinout and silicon-package-board interactions.
• Complete documentation and collateral into the product lifecycle management system of record.

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
• Find out more about the benefits of working at Intel .

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees