Silicon Architect, Diffusion ASICs

Normal Computing CorporationNew York City, NY

About The Position

Normal Computing is building ASICs purpose-built for image and video diffusion inference, grounded in the physics of computation rather than the assumptions everyone else has inherited. The compute substrate has to be invented, not specified, and we are looking for the person who wants to help invent it. You will work directly alongside our lead architect and research engineers, contributing across the full architecture stack: compute core microarchitecture, memory subsystem, interconnect, and the FPGA prototyping that proves the decisions before silicon. The team is small. The scope is wide. The architecture is being shaped now, not refined, and your contributions will be visible in the chip when it tapes out.

Requirements

  • A degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent work experience.
  • Substantial experience in architecture or microarchitecture of high-performance digital systems.
  • AI accelerators, compute engines, or similarly complex logic.
  • Fluency moving between algorithm-level analysis and hardware specification.
  • Experience with simulation-driven architecture.
  • Familiarity with quantization and reduced-precision approaches for inference and their implementation implications.
  • Experience writing microarchitecture specifications and working closely with RTL engineers through implementation.
  • Proficiency in Python or C++ for performance modeling and analysis, and familiarity with SystemVerilog or equivalent RTL.
  • Comfort operating in an environment where the architecture is actively being discovered alongside the work.

Nice To Haves

  • PhD welcome but not required; the bar is the work, not the credential.

Responsibilities

  • Help define the architecture and microarchitecture of novel AI accelerator compute blocks.
  • PE array design, datapath organization, and support for efficiency techniques such as sparsity exploitation and reduced-precision computation.
  • Translate workload analysis and research findings into hardware specifications.
  • Identify where architectural innovation creates the most leverage, define the structures that realize it, and produce microarchitecture documents unambiguous enough for RTL engineers to implement against.
  • Reason across the full stack and defend PPA tradeoffs at every level.
  • Partner with the compiler lead on ISA co-design.
  • Own the FPGA prototyping work.
  • Stay current with the AI accelerator research landscape and be able to articulate clearly where Normal's approach differs from existing solutions and why that matters.

Benefits

  • Normal Computing is an Equal Opportunity Employer.
  • We celebrate diversity and are committed to creating an inclusive environment for all employees.
  • Normal Computing is committed to providing reasonable accommodations to individuals with disabilities.
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