SERDES/PHY/Memory engineer

TekWissen • Austin, TX

1d • Onsite

About The Position

The Client’s 3rd Party IP Team needs a person very familiar with all aspects of SERDES PHYs and capable of supporting pre-silicon integration of various kinds of these IP into all Client’s products, as well as providing post-silicon support across a range of test scenarios. The person has a strong PHY background in SERDES or Memory PHYs. They are a team player who has excellent communication skills and experience collaborating with other engineers. They have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Requirements

• Strong PHY background in SERDES or Memory PHYs.
• Excellent communication skills.
• Experience collaborating with other engineers.
• Strong analytical and problem-solving skills.
• Willingness to learn and take on problems.

Nice To Haves

• SERDES or memory PHY design experience of some kind.
• Understanding of power noise generation and sensitivity.
• Understanding of the basics of signal integrity, specifically termination impedance, characteristic impedance, transmission lines.
• Knowledge of clock distribution and clock specifications like jitter, DCD, etc.
• Some lab experience from functional validation or electrical testing/compliance of SERDES PHYs.

Responsibilities

• Support pre-silicon integration and post-silicon support of SERDES PHY IP.
• Support electrical analyses for power, signal, and clock integrity to ensure that SERDES IP operate successfully across many Client’s SoC environments.
• Support post-silicon teams for production screening, characterization, compliance, and functional testing of 3rd Party IP.

What This Job Offers

• Career Level: Mid Level
• Education Level: Associate degree