Serdes Analog Mixed-Signal Design Expert

Advanced Micro Devices, Inc•San Jose, CA

2d•Hybrid

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. AMD Serdes Technology Group develops high-performance electrical and optical transceivers in advanced CMOS PDKs. We are seeking an expert in analog/mixed-signal circuit design and architecture.

Requirements

The ideal candidate will have a strong background in advanced ultra-high-speed electrical and/or optical PHY design.
She/He needs to be a self-starter who collaborates well with various functional teams and customers to successfully drive projects to completion.
Ph.D. in Electrical Engineering or a related field or M.S. with relevant industrial experience in optical and/or electrical transceiver design.

Nice To Haves

Experience designing 200G+ CMOS transceivers, with a deep understanding of high-speed electrical and/or optical interface requirements.
Demonstrated proficiency in hands-on circuit optimizations, including tuning for power, performance, and area at both block and system levels.
Proven track record in silicon productization—from initial design through to bring-up, validation, and successful ramp to mass production.

Responsibilities

To own performance-critical analog mixed-signal circuit blocks used in Serdes, such as high-speed data converters (DAC and ADC), clocking (reference clock, PLL, clock dividers, muxes, buffers, regulators, multi-phase clock generators, error detection and correction), and analog front-end circuits (pad matching networks, ESD, CTLE, linear amplifier)
To define circuit-driven micro-architectures of Tx and Rx subsystems and drive sub-block level specs.
To own power, performance, area, and jitter budgets of analog design blocks
To mentor sub-block owners and conduct peer reviews of design and verification results
To work with pre-tapeout verification and post-silicon validation teams to bring up silicon and analyze silicon results