Senior Wafer & FPA Process Engineer

Safran DSICamarillo, CA

About The Position

The Senior Wafer & FPA Process Engineer is responsible for the development, ownership, and continuous improvement of manufacturing processes — spanning R&D and Production — for III-V semiconductor materials (GaAs, InP, InGaAs, GaSb) used in infrared detector fabrication, and for focal plane array (FPA) back-end processes including hybridization and substrate removal that convert detector arrays into finished sensor products. The role applies design of experiments (DOE) and statistical process control (SPC) methodologies to drive yield and reproducibility, and serves as a senior technical resource within the process engineering team, including mentorship of operators, technicians, and junior engineers.

Requirements

  • B.S. in Electrical Engineering, Materials Science, Physics, Chemical Engineering, or a related field; M.S. or Ph.D. preferred
  • Experience with the operation of nanofabrication equipment including Photolithographic stepper, metal deposition, wet/dry etching, SEM, and plasma deposition machines
  • 7-10+ years of experience in microelectronic semiconductor fabrication and wafer handling techniques
  • Candidate should possess a proven track record of developing solutions to process development problems
  • Experience with Design of Experiments and Statistical Process Control
  • Ability to understand and analyze data related to semiconductor device performance
  • Ability to convey data analysis in an accurate and concise format and developing and delivering presentations
  • Experience with creating reports, documenting tests, and creating and reviewing process work instructions
  • Requires U.S. Citizenship or Permanent Resident Status required.

Nice To Haves

  • Familiarity with infrared detector technologies (e.g., InGaAs SWIR, MWIR, LWIR) and FPA/ROIC architectures
  • Experience in mask design and with mask design software
  • Program or project management experience
  • Ability to mentor team members
  • Works well in a fast-paced team environment
  • Strong organizational and communication skills
  • Excellent writing skills and computer capabilities (MS Office, MatLab, Python)
  • Experience in MES, computer programming and software development
  • Ability to complete tasks with minimal supervision
  • Experience working in an ITAR environment

Responsibilities

  • Develop and optimize wafer-level and FPA-level fabrication processes for infrared detectors and other optoelectronic devices
  • Develop semiconductor wafer processes for III-V materials (InP, GaAs, InGaAs, GaSb), including photolithography, wet/dry etch, metal and dielectric deposition, and surface preparation/passivation
  • Develop and sustain FPA-level processes, including indium bump deposition, underfill, and substrate thinning/removal
  • Develop back-end processes including wafer dicing, die-level cleaning, and FPA inspection and screening
  • Perform failure analysis and root-cause investigations on wafer- and FPA-level yield issues and implement corrective actions
  • Create process Travelers and Work Instructions with clear instructions
  • Track processes and make notes via process travelers
  • Run designed experiments to improve process reproducibility and increase yield
  • Participate in device test data reviews and suggest process improvements to improve device performance
  • Provide engineering and operator oversight
  • Mentor and train operators, technicians, and junior engineers in process execution and cleanroom best practices
  • Ensure safe handling of process chemicals and compliance with cleanroom protocols and EHS requirements
  • Perform other duties as assigned

Benefits

  • Participation in individual performance bonus plan
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