Senior Staff Testing Engineer

Marvell Technology•Westlake Village, CA

7d•$120,200 - $177,820

About The Position

As a test development senior staff engineer in the Operations business group, you will test features on the silicon semiconductor chips Marvell produces for internal and external customers. You will make sure we don’t ship out any underperforming units. You’ll work closely with design to make sure their chip features are testable and that the results meet the customer’s specifications. You may even have to write new code or develop new testing strategies when our chips outpace the capabilities of current testing equipment.

Requirements

Ph.D. or Master’s degree in Electrical Engineering, Physics, Photonics, or a closely related field.
8+ years of hands-on experience in silicon photonics design, characterization, or production testing.
Deep theoretical and practical knowledge of integrated optics, including waveguiding principles, grating couplers, edge couplers, microring resonators, Mach-Zehnder modulators (MZMs), and APDs/PIN photodetectors.
Proficient in developing complex, robust automation frameworks using Python, LabVIEW, or C/C++ for instrument control, hardware synchronization, and data acquisition.
Extensive experience with high-speed optical and RF test equipment, including LCA (Lightwave Component Analyzers), sampling oscilloscopes, optical switches, and sub-micron precision alignment stages
Strong statistical skills with experience using data analysis tools (e.g., JMP, MATLAB, Pandas/NumPy, or SQL) to handle large-scale wafer/die test datasets.

Responsibilities

Define the overall test strategy, roadmap, and architecture for wafer-level and die-level/module-level testing of silicon photonics devices.
Design, build, and optimize fully automated, high-throughput optical test beds integrating precision alignment systems, tunable lasers, optical spectrum analyzers (OSAs), and high-speed RF instrumentation.
Collaborate closely with the SiPh Design and Layout teams to implement robust DFT and DFM (Design for Manufacturing) features, ensuring early-stage designs are optimized for scalable automated testing.
Lead the electro-optic characterization of active and passive components, including insertion loss, polarization dependence (PDL), responsivity, high-bandwidth RF parameters ($S$-parameters), eye diagrams, and Bit Error Rate (BER).
Develop advanced data analysis pipelines to parse large volumes of test data.
Utilize statistical process control (SPC) to identify yield detractors, root-cause failures, and drive continuous improvement in chip performance and manufacturing yield.
Partner with external OSATs, foundry partners, and test equipment vendors to co-develop customized optical probers, instrumentation, and production-line test setups.