Senior Staff Software Engineer, Storage DPU

Crusoe•San Francisco, CA

4d•$245,000 - $290,000

About The Position

Crusoe is building a globally distributed, high-performance storage platform purpose-built for AI/HPC workloads. We're looking for a Senior Staff Software Engineer to own how Crusoe's storage stack uses DPUs (NVIDIA BlueField-class SmartNICs) and related hardware offload to move that work off the host CPU and onto purpose-built silicon. This is a software-defined-acceleration role sitting at the boundary between our storage data plane and the physical network/compute fabric — you'll design and build the control-plane and data-plane software that lets Crusoe's storage stack take advantage of hardware offload for NVMe-oF, RDMA, and related protocol-level work, in close partnership with the Storage Networking and Compute/Hypervisor teams. You will set technical direction for DPU/offload strategy within Storage, work hands-on across the host/DPU boundary, and partner closely with the storage-networking, and Compute hypervisor-level DPU function.

Requirements

10+ years of professional software engineering experience, with deep, hands-on systems-level programming (C, C++, or Rust) and production experience in Go, Java, or similar for control-plane/orchestration work.
Direct, hands-on experience with SmartNICs/DPUs in production — NVIDIA BlueField (2/3), Intel IPU, ConnectX 6/7, or comparable hardware-offload platforms.
Working knowledge of NVMe-oF, RDMA/RoCE/InfiniBand, and the storage protocols DPU offload commonly accelerates.
Experience with kernel-bypass and hardware-offload techniques: SR-IOV, vDPA, virtio (virtio-blk/virtio-fs), XDP/eBPF, or DPDK/SPDK.
Strong Linux systems background — kernel internals, device drivers, I/O subsystems — sufficient to debug issues that span host, hypervisor, and DPU.
Experience contributing to at least one of file, block, or object storage systems, and genuine comfort working alongside (not reimplementing) mature storage data planes.
Demonstrated ability to work across team boundaries — this role sits at the intersection of Storage, Networking, and Compute, and will not succeed as a purely heads-down IC function.
Bachelor’s degree or higher in Computer Science, Engineering, or related discipline

Nice To Haves

Direct experience with NVIDIA DOCA, BlueField SNAP, or other DPU-native storage-virtualization frameworks.
Experience building or operating NVMe-oF target/initiator offload in production.
Prior work on multi-tenant hardware isolation (SR-IOV/vDPA) in a cloud or hyperscale environment.
Familiarity with GPUDirect Storage or other GPU-to-storage data-path optimizations relevant to AI/HPC workloads.
Open-source contributions to DPDK, SPDK, Open vSwitch, or similar projects.

Responsibilities

Design and implement software that offloads storage-protocol work (NVMe-oF target/initiator processing, encryption, compression, checksums, erasure coding) from the host CPU onto DPUs/SmartNICs, measurably reducing host CPU overhead per I/O.
Build and maintain the integration between Crusoe's storage orchestration layer and DPU-resident services, including provisioning, health/telemetry, and failover of offload paths.
Partner with the storage-networking function on the RDMA/RoCE and NVMe-oF fabric work that DPU offload depends on, and with Compute/Hypervisor on SR-IOV/vDPA-based virtualization of DPU resources for multi-tenant isolation.
Evaluate and integrate vendor DPU SDKs and frameworks (e.g., NVIDIA DOCA, BlueField SNAP) to accelerate storage virtualization (virtio-blk/virtio-fs offload) without building bespoke firmware from zero.
Build monitoring and testing infrastructure specific to DPU-offloaded paths — this is new surface area for the team, and strong tooling here determines how fast we can safely iterate.
Drive IOPS/throughput/latency benchmarking and quantify host-CPU-cycles-saved per offloaded operation, to make the case for where offload investment pays off next.
Serve as the storage team's technical lead on DPU-related architecture decisions, including with hardware vendors.