Senior Staff Program Manager

Marvell Technology•Santa Clara, CA

5d•$132,610 - $198,600

About The Position

Marvell is seeking a seasoned Senior Staff Program Manager to lead the delivery of next-generation semiconductor solutions built on industry-leading process technologies. This role drives execution across highly complex, cross-functional programs addressing some of the most demanding challenges in AI, wired and wireless communications, and critical infrastructure markets. As part of the Photonic Fabric Hardware Engineering Program Management team, you will lead end-to-end program execution for complex silicon design initiatives, with a strong focus on design engineering delivery and business outcomes. This role partners closely with cross-functional engineering, product, and operations teams to drive the development of silicon-based subsystems that are foundational to multiple Business Unit programs. You will operate in a highly visible environment, providing program leadership, risk management, and execution transparency while engaging regularly with senior executives and technical leaders to ensure alignment on priorities, schedules, and strategic objectives.

Requirements

BS in Electrical/Computer Engineering or related field (10–15 yrs exp); MS preferred (8-10 yrs exp).
7+ years of program management experience in the semiconductor industry, driving SoC/HW programs from definition to mass production.
Solid working knowledge of the full silicon development flow: RTL, DV, DFT, PD, FW/SW integration, post-silicon characterization, and packaging.
General familiarity with TSMC advanced node flows (N5/N4/N3/N2+) — process milestones, yield ramp, and PCN management.
Strong vendor and subcontractor management experience (foundry, OSAT, IP suppliers).
Exceptional communication, risk management, and cross-functional leadership skills.

Nice To Haves

PMP certification preferred.
Lives the Marvell Core Behaviors.

Responsibilities

Own end-to-end program execution across silicon development stages — architecture, RTL, DV, DFT, PD, FW, post-silicon characterization, and mass production ramp.
Drive tapeout readiness, milestone tracking, and sign-off across all engineering disciplines; manage silicon bring-up, errata, and corrective actions to closure.
Manage foundry, OSAT, IP, and third-party vendor relationships; negotiate SOWs, track commitments, and escalate risks proactively.
Develop and maintain program plans (WBS, schedules, risk registers); lead POR/PSM planning sessions and executive program reviews.
Work across a large matrix organization to align engineering execution with business unit objectives; drive cross-functional issue resolution and continuous process improvement.