Senior Staff Pre Silicon Verification Engineer
About The Position
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. THE ROLE: Adaptive and Embedded Computing Group (AECG) seeks a Senior Staff Silicon Design Verification Engineer to provide technical leadership and expertise in the verification of cutting-edge DRAM Memory Controller IPs (DDR5, LPDDR6, HBM4), high-speed Crypto, and Network-on-Chip (NoC). You will be responsible for architecting, developing, and utilizing simulation and/or formal-based verification environments at both block and SoC-level to achieve first-pass silicon success.
Requirements
- Require BS w/ 8+ yrs or MS w/ 6+ yrs or PhD w/ 3+ yrs in Electrical Engineering, Computer Engineering, or Computer Science.
- Require hands on experience with verification of state-of-the-art memory controllers such as DDR, LPDDR, and HBM.
- Requires strong understanding of current memory controller protocols and calibration (DDR3/4/5, LPDDR4/5/6, HBM2/3/4), board skew and jitter modeling.
- Require proven track record in technical leadership of teams with 5+ engineers. This includes planning, execution, tracking, verification closure, and delivery to programs.
- Require experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS or Cadence Xcelium.
- Require strong understanding of state of the art of verification techniques, including assertion and metric-driven verification.
- Require familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management.
Nice To Haves
- Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high-performance IP and/or VLSI designs is a plus.
- Experience with formal property checking tools such as VC Formal (Synopsys), JasperGold (Cadence), and Questa Formal (Mentor) is a plus.
- Experience with gate-level simulation, power-aware verification is a plus.
- Experience with silicon debug at the tester and board level, is a plus.
Responsibilities
- Lead the verification of high-speed Crypto, Network-on-Chip (NoC), cutting-edge DRAM Memory controller (DDR5, LPDDR6, HBM4) designs, ensuring the highest standards of quality and performance.
- Architect, develop, and use simulation and/or formal-based verification environments at IP and SoC-level.
- Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs.
- Develop and execute comprehensive verification plans, including testbenches and test cases.
- Collaborate with design, architecture, and software teams to define and implement verification strategies.
- Utilize advanced verification methodologies, including UVM, formal verification, and assertion-based verification.
- Mentor and guide junior engineers, fostering a collaborative and innovative team environment.
Benefits
- AMD benefits at a glance.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
