Senior Staff Post-Silicon Automation Engineer (PAM4 DSP)

Marvell TechnologySanta Clara, CA
$131,010 - $196,300

About The Position

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Marvell’s Ethernet PAM4 Validation team is responsible for validating high-speed connectivity products used in data centers, AI clusters, cloud infrastructure, and enterprise networking platforms. The team works on DSP/PHY/device-level validation, switch interoperability, firmware upgrade validation, link recovery, optical and cable validation, DSP tuning, automation, and customer issue debug. Without this team, Marvell would not be able to confidently deliver high-speed Ethernet products that meet customer expectations for performance, reliability, interoperability, and deployment readiness. The team plays a key role in closing validation gaps, supporting critical customer programs, improving product quality, and enabling timely delivery of current and next-generation products. Engineers on this team work close to real hardware, firmware, lab equipment, switches, optics, cables, automation frameworks, and customer-like system setups. The technology they validate powers the networking infrastructure behind AI applications, cloud services, video streaming, storage systems, and large-scale digital connectivity used around the world.

Requirements

  • Bachelor’s degree in Computer Science, Electrical Engineering, Electronics Engineering, or related fields with 3–15 years of professional experience, or Master’s/PhD in a related field with 2–10 years of experience.
  • Hands-on lab experience using oscilloscopes, BERTs, protocol analyzers, optical switches, traffic generators, temperature chambers, or similar validation equipment.
  • Strong automation skills using Python, Shell, or similar scripting languages for test execution, data collection, log parsing, and result analysis.
  • Experience with C/C++ or low-level software development for hardware control, register access, firmware interaction, or test development is preferred.
  • Familiarity with Linux environments, device drivers, hardware/software interaction, lab servers, CI systems, and validation infrastructure.
  • Strong debugging skills for link-up issues, signal integrity problems, firmware failures, interoperability issues, and customer-reported defects.
  • Ability to analyze large volumes of validation data, logs, counters, telemetry, and test results to identify root cause and drive closure.
  • Clear communication skills to collaborate with firmware, silicon, systems, software, applications, and customer engineering teams.
  • Ability to work independently in a fast-paced, ambiguous hardware development environment with aggressive customer and product delivery timelines.
  • Curiosity and passion for understanding how complex silicon, firmware, and system-level Ethernet products behave in real deployment conditions.

Nice To Haves

  • Experience in validation, bring-up, debug, or characterization of DSPs, PHYs, SoCs, ASICs, CPUs, GPUs, or high-speed networking devices.
  • Hands-on experience with Ethernet validation, PAM4 signaling, switch-level interoperability, device-level validation, or high-speed SerDes bring-up.
  • Knowledge of high-speed interfaces such as Ethernet, PCIe, I2C, MDIO, CMIS, or related hardware/software control interfaces.
  • Experience working with switches, optics, AEC/ACC cables, PHY/DSP devices, firmware builds, and system-level validation environments.

Responsibilities

  • Develop Python, Shell, and automation scripts for test execution, data collection, log parsing, regression coverage, and dashboard reporting.
  • Build AI-assisted and agentic validation workflows for automated test execution, failure triage, log analysis, anomaly detection, root-cause recommendation, and debug artifact collection.
  • Develop intelligent debug agents that analyze telemetry, FEC counters, firmware logs, register dumps, and validation results to reduce manual debug effort and accelerate customer issue closure.
  • Collaborate with firmware, design, systems, software, application, and customer engineering teams to define validation coverage, reproduce failures, verify fixes, and drive issue closure.
  • Support critical customer programs and product delivery milestones by improving validation coverage, execution efficiency, automation, debug quality, and product readiness.
  • Develop validation plans for Ethernet PAM4 DSP, PHY, ASIC, AEC/ACC, optical, and switch-facing products.
  • Execute device-level and switch-level post-silicon validation, including bring-up, interoperability, functional testing, performance characterization, stress testing, and link stability validation.
  • Validate high-speed Ethernet links across firmware builds, CDB configurations, traffic patterns, cable types, optical modules, switches, and customer-like operating conditions.
  • Debug link-up, link-flap, signal integrity, firmware upgrade, CDB upgrade, interoperability, and customer-reported issues using lab equipment, logs, counters, telemetry, and register-level analysis.

Benefits

  • employee stock purchase plan with a 2-year look back
  • family support programs
  • robust mental health resources
  • recognition and service awards
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