Senior Staff Engineer, GPU Design Verification (Formal Verification)

Samsung Electronics•San Jose, CA

4d•$198,200 - $297,200•Onsite

About The Position

Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us! As a Senior Staff GPU Design Verification Engineer – Formal Verification, you will help shape block and subsystem level formal verification for Samsung’s next-generation mobile GPU. In this high-impact individual contributor role, you will contribute to the formal verification strategy and hands-on verification of GPU designs, ensuring functional correctness, power gating mechanisms, and architectural intent. You bring strong expertise in formal methods, GPU design verification, and a strong innovative mindset to explore, experiment, and adopt new formal verification approaches supporting concurrent development cycles.

Requirements

10+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 8+ years of experience with a Master’s Degree, or 6+ years of experience with a Ph.D.
8+ years of hands-on experience with GPU, CPU, or advanced semiconductor design verification with a focus in formal verification.
Strong understanding of computer architecture and graphics pipelines.
Strong programming and scripting skills in Python, Perl, C/C++, or equivalent.
Proficient in System Verilog and System Verilog Assertions (SVA) languages.
Strong expertise in formal verification methodologies, including property verification, data path checking, model checking, register verification, connectivity checking and coverage analysis.
Hands-on experience with industry-standard formal verification EDA tools and methodologies.
Excellent debugging, analytical, and problem-solving skills, with proven ability to identify bottlenecks, propose solutions.
Infuse out-of-box- thinking and guide teams through different phases of design implementation.
Excellent communication and collaboration skills, with the ability to navigate ambiguity and influence in a fast-paced, global team environment.

Nice To Haves

Knowledge of memory subsystem or coherent interconnects is a plus.
Proficiency in constrained random verification using IEEE 1800TM Universal Verification Methodology (UVM).
Experience with developing new formal verification methodologies, flows, or tooling.
Exposure to low-power design techniques and verification of power intent (e.g., UPF concepts).
Demonstrated passion for innovation, ideation, and advancing the state of formal verification practices.

Responsibilities

Leveraging your expertise in one or more technical areas, you will contribute to the block and subsystem level formal verification strategy and execution by defining verification goals, properties, coverage objectives, and sign-off criteria for critical GPU features, including clock and power gating.
You excel at architecting and implementing formal verification environments.
You collaborate closely with architecture and RTL teams to develop assertions, properties, and formal models using industry-standard formal tools and methodologies to validate complex graphics and compute behavior.
You ensure functional and performance excellence by helping team apply formal techniques to exhaustively verify corner cases, state-space behaviors, and safety properties that validate beyond simulation-based verification.
You help drive complex debug analysis and root-cause resolution by analyzing formal failures, tracing counterexamples, and collaborating closely with design and architecture teams to ensure verification aligns with architectural intent and improve design robustness.
You implement advanced formal verification techniques towards proof depth, bug hunting, complexity handling, bounded proof, failure triaging, cover scenarios and convergence analysis to achieve formal verification closure of GPU design features
You adhere to project execution and planning approaches using Confluence, JIRA and relevant techniques, and create/maintain documentation for formal verification test plans, convergence reports, complexity analysis reports and results.
You inspire high performance by mentoring engineers, fostering a culture of ownership, accountability and innovation driven execution, and staying ahead of emerging GPU and formal verification methodologies.