Senior Staff Engineer, Electrical Design (Signal Integrity)

Celestica International LP • San Jose, CA

5d • $128,000 - $200,000 • Onsite

About The Position

The Signal Integrity Engineer provides design guidelines and support across the entire product lifecycle including system architecture design, board layout, product bring-up, debugging, validation, and factory builds. In this role, you will perform testing, simulation, validation, and qualification of systems, making critical design adjustments as needed. You will work in a cross-functional team with other designers, customers, manufacturing engineering, and project leadership to ensure robust, high-quality product development. Additionally, you will enhance designs by incorporating feedback from reviews in areas such as manufacturing, testing, supply chain, reliability, industrial design, and simulations.

Requirements

• Strong knowledge in simulation tools like Hspice, Sigrity, ADS, Ansys SIwave, HFSS 3D.
• Strong knowledge in Signal Integrity and Power Integrity fundamental concepts.
• Strong experience in Package and PCB modelling is required.
• Keep up to date with relevant industry knowledge and regulations
• 7–10 years of relevant experience in a similar role.
• Bachelor's degree in Electrical Engineering or a related field.

Nice To Haves

• May be a recognized expert (go to person) in one or more technical areas.

Responsibilities

• Models high-density I/O's on PCBs, packages, connectors and probe cards with respect to parameters such as reflections, bandwidth, and crosstalk
• Lead the design, development and implementation of technical solutions for complex projects, involving multiple domains. Participate in project planning and scheduling.
• Performs Transmission line & Via modelling and carry out experiments to validate modelling outcomes and methodologies.
• Should be able to analyze and review the layout files related to Signal integrity and Power Integrity problems.
• Should be able to provide practical solutions to PCB/Package design team based on simulation results and analysis.
• Conducting Simulation of memory interfaces for Board and Package and High Speed Serial IO interfaces for Board and Package.
• Perform decoupling capacitor optimization, Loop inductance analysis.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior