Senior Staff Digital Design Engineer

Marvell Technology • Irvine, CA

1d

About The Position

Marvell is hiring a Digital IC Design Senior Staff Engineer for its Connectivity business group, which focuses on communication, data centers, and AI infrastructure. The role involves designing digital IP blocks and subsystems and supporting their implementation, validation, and optimization. The engineer will own at least one major sub-circuit block, from architecture definition through fine-tuning, and contribute to silicon validation and team development.

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering, or a related field and 5–10+ years of related professional experience; or a Master’s degree and/or PhD in those fields with 3+ years of experience.
• Experience independently analyzing and optimizing sub-circuit blocks across process, voltage, and temperature.
• Ability to take responsibility for a major sub-circuit block from architecture definition through fine-tuning.
• Ability to identify and propose design improvements for a major sub-circuit block.
• Experience participating in root-cause investigations and silicon validation of model-to-hardware correlation issues.
• Experience mentoring and coaching less experienced team members.

Nice To Haves

• Knowledge of communication and DSP algorithms.
• Verification experience, preferably with UVM.

Responsibilities

• Develop RTL designs using Verilog/SystemVerilog for digital IP blocks and subsystems.
• Translate architectural specifications into clean, synthesizable RTL.
• Perform linting, clock-domain crossing (CDC), and low-power design checks.
• Analyze timing, area, and power tradeoffs during design implementation.
• Support synthesis and work with physical design teams on timing-closure issues.
• Debug functional issues discovered during simulation, emulation, FPGA prototyping, or silicon bring-up.
• Independently analyze and optimize small sub-circuit blocks across process, voltage, and temperature (PVT).
• Serve as the responsible engineer for at least one major sub-circuit block, from architecture definition through fine-tuning.
• Identify and propose innovative solutions to enhance the design of at least one major sub-circuit block.
• Participate in root-cause investigation and silicon validation of model-to-hardware correlation issues.
• Mentor and coach new or less experienced team members.

Benefits

• Bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
• Employee stock purchase plan with a two-year look back.
• Family support programs.
• Mental health resources.
• Recognition and service awards.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior