Senior Staff Design Verification Engineer
Marvell Technology•Westborough, MA
•$151,000 - $223,440
About The Position
As a SoC-level design verification engineer, you will be responsible for the development and maintenance of UVM testbench components and other verification testing collaterals. You will be a member of a team charged with ensuring design quality in a variety of complex SoC architectures. Analyze architectures and designs to create comprehensive test plans and strategies. Contribute to the development of verification environments. Develop tests/testing strategies to achieve coverage goals. Debug failures and work with designers to resolve issues.
Requirements
- Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience, OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience.
- Experience with Verilog and SystemVerilog, preferably with UVM.
- Basic proficiency with C/C++.
- Experience with scripting languages, e.g., Python or Perl.
- Working knowledge of the Linux operating system.
Responsibilities
- Development and maintenance of UVM testbench components and other verification testing collaterals.
- Ensuring design quality in a variety of complex SoC architectures.
- Analyzing architectures and designs to create comprehensive test plans and strategies.
- Contributing to the development of verification environments.
- Developing tests/testing strategies to achieve coverage goals.
- Debugging failures and working with designers to resolve issues.
Benefits
- Employee stock purchase plan with a 2-year look back
- Family support programs
- Robust mental health resources
- Recognition and service awards
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What This Job Offers
Job Type
Full-time
Career Level
Senior
