Renesas is seeking a Senior Staff Analog Design Engineer to join their Design Team. This role involves defining, designing, and developing innovative circuits for high-performance timing products. The engineer will mentor and lead junior designers, lead new product development projects, and collaborate closely with remote engineering teams including layout, digital, system design, and validation. Responsibilities also include supporting lab testing, debugging, and characterization of prototypes, and providing technical support throughout the product development cycle. The ideal candidate will possess a great attitude, self-motivation, excellent teamwork skills, solid knowledge of integrated circuit design, device physics, and advanced process technology, with specific experience in designing PLLs or their building blocks (VCO, phase detector, charge pump). A deep understanding of transistor modeling, circuit noise theory, and phase noise concepts is required, along with proficiency in Cadence analog/mixed-signal simulation toolset and familiarity with the Analog/Mixed Signal design flow, simulation models, design rules, verification procedures (DRC/LVS/ERC), and transistor-level simulations. Related experience in digital PLLs, crystal oscillators, VCXOs, on-chip regulators, DACs, and ADCs is beneficial, as is experience with analog behavioral modeling (Systemverilog, Verilog A, AMS) and hands-on lab testing and characterization.
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Job Type
Full-time
Career Level
Senior