Senior Semiconductor Device Yield Engineer

HRL Laboratories • Malibu, CA

1d • $172,900 - $221,600 • Onsite

About The Position

HRL Laboratories, an IBM company, pioneers the next frontiers of physical and information science. Delivering transformative technologies in automotive, aerospace and defense, HRL advances the critical missions of its customers to help them remove limitations and create competitive advantage. HRL then transitions the work back to customers – ready for real-world application. For more than 70 years, HRL’s rich portfolio of scientific discoveries and engineering innovations continues to build on each other — often in unexpected, profound and far-reaching ways. As a private company owned by IBM, HRL prioritizes purpose over profit, significantly advancing the state of the art.

Requirements

• Ph.D. in Electrical Engineering, Physics, or related field; plus 7+ years of relevant experience in semiconductor yield engineering or quantum‑device testing.
• Strong expertise in semiconductor or quantum‑device testing, yield characterization, and cryogenic measurement methods.
• Experience with materials‑based failure analysis and familiarity with fabrication processes, cleanroom techniques, and semiconductor device physics.
• Background in statistical analysis, design of experiments, and interpretation of large measurement datasets.
• Proficiency in Python, SQL, or similar tools for data analysis, automation, and database operations.
• Ability to document complex results clearly and communicate technical findings to multidisciplinary teams.
• Expertise with cryogenic test equipment and related measurement workflows.

Responsibilities

• Lead the development, deployment, and refinement of automated cryogenic test pipelines used to characterize semiconductor‑based spin‑qubit devices across multiple hardware platforms.
• Drive quantum‑device testing and yield characterization by analyzing electrical measurements collected at various temperature stages, including coherent spin‑qubit characterization, and relating results to fabrication processes and device‑design choices.
• Help lead the design of scalable test architectures that improve measurement throughput, repeatability, and consistency while supporting long‑term device‑yield improvement.
• Investigate device failures using established material characterization techniques and consolidate results into structured reports and clear recommendations for fabrication and process engineering.
• Organize and maintain device‑test databases, extract key metrics, and perform statistical data analysis to identify trends, correlations, and root‑cause indicators.
• Collaborate across semiconductor materials, device‑design, and process‑engineering teams to integrate measurement results into device and process models, guiding future qubit and fabrication development.
• Develop Python‑ and SQL‑based tooling to automate data processing, improve analytical workflows, and support scalable testing infrastructure.
• Communicate findings through clear oral presentations, written reports, and cross‑functional reviews, contributing to experimental strategy and continuous improvement of device‑yield methodologies.

Benefits

• medical
• dental
• vision
• life insurance
• 401K match
• gym facilities
• PTO
• Sick time
• upward mobility

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: Ph.D. or professional degree