Senior Research Scientist, Superconducting Hardware

Q-CTRL•Los Angeles, CA
•$150,000 - $225,000

About The Position

Q-CTRL is seeking a Senior Research Scientist to advance the control and calibration of superconducting quantum hardware. The role focuses on runtime calibration methods for optimizing two-qubit gates, supporting high-fidelity execution of quantum algorithms and quantum error correction at scale. The scientist will move calibration execution closer to the hardware by leveraging FPGA compute and low-latency communication with the compute host. Working with quantum scientists, software engineers, and cross-functional research, product, and engineering teams, the role applies research insights to complex quantum computing challenges and translates them into robust software tools. The Quantum Computing Research team develops methods to improve the performance of contemporary and next-generation quantum computers. Its work includes quantum advantage applications and the use of AI, control theory, and physics to optimize and automate parts of the quantum computing stack, as well as research into quantum error correction and integration of quantum computers with high-performance computing and data centers.

Requirements

  • Advanced degree in Physics, Engineering, or a closely related discipline; exceptional candidates with previous industry experience may also be considered.
  • At least 3 years of research experience in a relevant field.
  • Deep understanding of superconducting qubit physics and RF engineering.
  • Expertise calibrating two-qubit gates for transmon architectures, such as tunable couplers, parametric gates, or cross-resonance.
  • Experience with the calibration control stack, signal chain, and FPGAs.
  • Understanding of software development best practices and experience developing software modules for qubit measurement and control using Python, C++, or Rust.

Nice To Haves

  • PhD in Physics, Engineering, or a closely related discipline.

Responsibilities

  • Design and test novel calibration techniques for two-qubit gates across different hardware architectures.
  • Develop scalable processor-optimization protocols, including cross-talk mitigation, leakage reduction, and defect mitigation.
  • Conduct research in runtime control strategies that leverage low-latency compute.
  • Collaborate with engineering and product teams to translate research ideas and outcomes into production-level software.
  • Explain, document, and present research solutions in accessible language.

Benefits

  • Flexibility
  • Equity potential
  • Competitive benefits
  • The role may be eligible for annual discretionary bonuses, equity, and other forms of compensation outside the targeted salary range.
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