Senior Principal Engineer
About The Position
Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Senior Logic Design Engineer to join our Memory Controller team in Hillsboro, OR. In this role, you will work with some of the brightest inventors and engineers in the world to architect, develop, and deliver advanced products that make data faster and safer. As a Senior Design/Application Engineer, you’ll play a leadership role in defining, designing, delivering, and supporting our Memory Controller products. In this full-time role, you’ll report directly to our Director of Engineering and partner closely with architecture, verification, implementation, product, and customer-facing teams. Our Memory Controller Group is dedicated to building and releasing truly differentiated silicon IP products, and your technical leadership will be instrumental in driving high-quality execution from concept through customer deployment. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field; Master’s degree preferred
- Typically 8+ years of experience in RTL design, IP development, SoC integration, or related semiconductor design roles
- Expert-level proficiency with Verilog/SystemVerilog and strong understanding of digital design, microarchitecture, timing, and low-power design concepts
- Hands-on experience delivering production-quality IP or silicon products through multiple phases of the development lifecycle
- Strong debugging skills across RTL simulation, verification environments, integration flows, and customer use cases
Nice To Haves
- Experience with memory controllers, high-performance interfaces, data center architectures, or configurable silicon IP preferred
- Demonstrated ability to lead technical discussions, make sound engineering tradeoffs, mentor engineers, and communicate effectively across teams and with customers
Responsibilities
- Define microarchitecture, develop high-quality RTL, and guide implementation tradeoffs across performance, area, power, timing, and configurability
- Lead the design, integration, validation, and delivery of complex Memory Controller IP features and releases
- Drive integration of internal and 3rd party IP, including interface definition, configuration, documentation, and quality closure
- Lead debug of complex simulation, integration, and customer-reported issues through root cause and corrective action
- Collaborate with verification teams to develop robust test plans, improve coverage, and ensure design intent is fully validated
- Provide technical guidance and mentoring to engineers while promoting best practices in RTL design, review, documentation, and methodology
- Partner with customers and field teams to support integration, resolve technical issues, and influence product improvements
Benefits
- matching 401(k)
- employee stock purchase plan
- comprehensive medical and dental benefits
- time-off program
- gym membership
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
What This Job Offers
Job Type
Full-time
Career Level
Senior
