Senior Principal Engineer, Micro-architecture and RTL
About The Position
About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Senior Principal Engineer with Marvell, you’ll be a member of the Central Engineering's connectivity business group. This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates.
Requirements
- Creating micro-architectural specs from standards, architectural specifications.
- System Verilog RTL coding with System Verilog Assertions.
- Universal Verification Methodology.
- Creating modular/reusable design components.
- Embedded micro-controller systems.
- Ability to multi-task and must be flexible and adaptable to a rapidly changing and demanding environment.
- Demonstrated success in project leadership.
Nice To Haves
- Experience in the following areas is a plus: Ethernet, PCIe and CXL.
- Knowledge of power conversions systems.
Responsibilities
- Design, develop, implement, verify, and document micro-architecture and RTL for complex power management integrated circuits.
- Work closely with system and chip architects to design industrial quality implementations.
- Participate in the full design development cycle, end-to-end, from writing micro-architecture docs, RTL coding, specifications of timing, closely work with design verification teams to review test plans and execution of test, ability to bring up block tests on silicon during lab testing, and maintenance of designed blocks and reusable IPs.
- Produce comprehensive block uArchitecture and register Specs.
- Schedule detailed reviews with cross-functional teams Evaluate and participate in improving design and verification methodologies.
- Supervise or mentor other digital design engineers.
Benefits
- employee stock purchase plan with a 2-year look back
- family support programs to help balance work and home life
- robust mental health resources to prioritize emotional well-being
- recognition and service awards to celebrate contributions and milestones
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
What This Job Offers
Job Type
Full-time
Career Level
Senior
