Senior / Principal DRAM Product Development Engineer – DEG Technology

Micron Technology • Boise, ID

7d

About The Position

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This role focuses on DRAM product development, enabling new process nodes, and ensuring product quality and performance.

Key Responsibilities include technical expertise in circuit design and verification, technology development and product ramp support, silicon bring-up and yield improvement, layout and optimization, cross-functional collaboration, innovation using AI and automation, and technical leadership through documentation, presentations, and mentorship.

Requirements

• Bachelor’s degree in Electrical or Computer Engineering or Physics (emphasis on semi electronics) or equivalent.
• Senior: 2–5 years of relevant experience in DRAM, NAND, Logic, or related interfaces.
• Principal: 8+ years of relevant experience in DRAM, NAND, Logic, or related interfaces.

Nice To Haves

• Master’s degree in Electrical or Computer Engineering or Physics (emphasis on semi electronics) or equivalent
• Deep understanding of high-speed IO, SI/PI, PDN, CMOS device physics, and BSIM modeling.
• Experience applying AI or automation to engineering workflows.
• Strong communication and technical leadership skills.

Responsibilities

• Design, analyze, and verify memory, logic, and analog circuits across advanced technology nodes.
• Own and support major data path blocks including Sense Amplifiers, timing distribution, calibration, and training features.
• Identify design marginalities and recommend circuit-level or architectural solutions to improve DRAM robustness, yield, and performance.
• Enable new process node startup, qualification, yield learning, and production ramp.
• Provide technical guidance to Technology Development teams using strong process and device integration knowledge.
• Develop and track key metrics to assess technology readiness.
• Support design verification and validation using CAD tools, modeling, and simulation.
• Define and execute silicon experiments and debug strategies in collaboration with Product Engineering.
• Perform electrical failure analysis of DRAM Array Sensing Schemes and lead yield improvement initiatives using statistical analysis.
• Guide Sense Amp layout activities including floor planning, placement, routing, and layout reviews.
• Perform parasitic extraction and modeling to optimize signal margin and memory bit interaction of Sense Amps and Wordline drivers.
• Drive layout-aware optimization decisions to improve scalability and manufacturability.
• Collaborate with Design, Technology Development, DFT, Test, Reliability, Quality, Manufacturing, Probe, Assembly, and Marketing teams.
• Partner with Applications Engineering to evaluate specifications and balance customer requirements with design and process constraints.
• Leverage AI-based tools, automation, and advanced analytics to improve design quality, yield learning, and workflow efficiency.
• Drive innovation for future memory generations.
• Document methodologies clearly, present results to technical forums and leadership, mentor junior engineers, and lead complex cross-functional initiatives.

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Senior