Senior Power and Performance Engineer

NVIDIA•Santa Clara, CA

8d•$168,000 - $310,500•Hybrid

About The Position

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Today, we're tapping into the unlimited potential of AI to define the next era of computing — an era in which our GPUs act as the brains of the computers, robots, and self-driving cars that understand the world. NVIDIA's Silicon Co-Design Group (SCG) is the team that gets every GPU, SoC, and CPU silicon program from first power-on to high-volume production. SCG sits at the crossroads of architecture, design, marketing, operations, and productization, and we architect innovative solutions for Datacenter, Server, Gaming, Robotics, Automotive, and Embedded markets. We are hiring a Senior Silicon Power and Thermal Controllers Engineer to design, implement, and productize the power-performance and thermal-control mechanisms that ship inside every GPU, CPU, and SoC. This is not a pure firmware role, nor is it a generic power-analysis role — you live at the seam where silicon, firmware, platform, and software meet, and your controllers decide how much performance our products can sustain within their thermal and power envelopes. The exceptional hire uses AI deliberately to compress debug and modeling cycles, with the judgment to know where it accelerates real work and where it introduces risk.

Requirements

BS or MS in Electrical Engineering, Computer Engineering, Systems Engineering, or related field (or equivalent experience).
6+ years implementing power and thermal controllers in firmware for GPU, CPU, or SoC products.
Hands-on experience with system-level silicon bring-up and validation, DVFS, power characterization and modeling, performance analysis, and perf-per-watt optimization.
Background in implementing system-level features, thermal policies, and data-analysis and statistics workflows.
Solid understanding of digital design, circuit analysis, CPU/GPU/SoC architecture, PTPX, advanced process technologies, and transistor/device physics.
Demonstrated experience operating across globally distributed and offshore engineering teams.
Strong written and verbal communication; able to translate complex post-silicon signals into crisp, decision-ready options for executive leadership.

Nice To Haves

Background in gaming, automotive, or datacenter market segments — you know how the power-thermal trade space changes across those product classes.
Track record of shipping system-level perf-per-watt or thermal-policy features that measurably improved a product at scale.
Proficiency with AI productivity tools (Claude, Copilot, ChatGPT, or equivalent) applied to power debug, modeling, or analysis workflows — and a clear view of the outcome and the guardrails you put in place.
Comfort navigating ambiguity, building technical structure inside fast-moving silicon programs, and working with global teams from diverse cultural backgrounds.

Responsibilities

Design, implement, and tune silicon power and thermal controllers in close partnership with firmware, hardware, software, and design/power-architecture teams — from spec through productization.
Drive debug and resolution of power-limiting constraints, and deliver efficient, time-to-market product-specific customizations that unlock performance without compromising the thermal envelope.
Deliver system-level power optimizations spanning silicon, platform, software, and manufacturing — for products ranging from large-scale datacenter accelerators to low-power client devices.
Partner with the SCG Tools team to left-shift modeling, analysis, and test infrastructure — refine methodologies, sharpen procedures, and bring new closed-loop techniques into production.
Validate silicon power and thermal features across multi-functional teams from bring-up through production silicon, and be responsible for the WARs and productized fixes through to confirmation.
Translate complex power, thermal, and performance signals into decision-ready options that give leadership the clarity to act on POR, binning, and program-impacting risks.
Work alongside system architects, chip and board designers, software/firmware engineers, power-architecture engineers, Product Definition Engineers, and ATE engineers in a high-energy environment to bring industry-defining products to market.