Senior PCB Layout Engineer

Hewlett Packard EnterpriseSunnyvale, CA
$105,500 - $213,500Onsite

About The Position

A Senior PCB Layout Engineer is a technical expert responsible for designing complex, high-speed printed circuit boards using the Cadence Design Systems Allegro PCB Designer platform. This role focuses on advanced constraint-driven layout, signal integrity awareness, manufacturing readiness, and automation (often with SKILL), while leading critical hardware projects. Design and deliver high-performance, multi-layer PCBs for complex electronic systems such as networking equipment, servers, telecom hardware, aerospace systems, or high-speed embedded platforms. The engineer works closely with hardware, SI/PI, mechanical, and manufacturing teams to ensure first-pass success and production readiness.

Requirements

  • 8–15+ years of PCB layout experience
  • Expert proficiency in Cadence Allegro
  • Strong knowledge of high-speed design techniques
  • Strong knowledge of impedance control and stackup planning
  • Strong knowledge of HDI technologies
  • Strong knowledge of EMI/EMC fundamentals
  • Solid understanding of PCB fabrication and assembly processes

Nice To Haves

  • Networking, server, or telecom hardware experience
  • Familiarity with 25G/56G/112G SerDes
  • Familiarity with backplane design
  • Familiarity with thermal/mechanical co-design
  • Experience with SI/PI analysis tools

Responsibilities

  • Design complex boards (12–40+ layers) using Cadence Allegro PCB Designer
  • Perform optimized component placement for high-speed digital, power distribution, thermal performance, and EMI control
  • Route critical interfaces such as DDR4/DDR5, PCIe Gen4/Gen5+, USB 3.x / Type-C, and Ethernet (10G–112G SerDes)
  • Implement differential pair routing and tuning, length and phase matching, and controlled impedance structures
  • Define and manage rules using Constraint Manager
  • Develop stackups with controlled impedance and fabrication feasibility
  • Work with PCB vendors to validate materials, via structures, and HDI capability
  • Apply SI/PI best practices including return path continuity, crosstalk reduction, and proper decoupling strategy
  • Collaborate with SI/PI teams and implement simulation-driven layout changes
  • Utilize blind/buried vias and microvias, BGA escape for high pin-count devices, and backdrilling for high-speed signals
  • Perform high-current and low-noise power routing
  • Generate fabrication and assembly outputs including ODB++, IPC-2581, Gerber, drill files, drawings, and stackup documentation
  • Perform DFM/DFA reviews with vendors
  • Support prototype builds and resolve manufacturing issues
  • Mentor junior and mid-level PCB designers
  • Lead layout planning and design reviews
  • Estimate schedules and manage multiple projects

Benefits

  • Health & Wellbeing comprehensive suite of benefits that supports their physical, financial and emotional wellbeing
  • Personal & Professional Development programs catered to helping you reach any career goals
  • Unconditional Inclusion
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