Senior NPI Packaging Engineer

Murata America•San Diego, CA

2d•$122,200 - $158,868•Onsite

About The Position

This position assists with all aspects of semiconductor packaging through all phases of product development which includes early concept feasibility, prototyping, product qualification, and product transition to production. The individual is fully conversant with microelectronics packaging technologies and has in-depth understanding of the interactions between manufacturing processes, verification testing, and quality assurance methodology. This individual facilitates the interests of packaging on cross functional engineering teams. This position must enjoy working in a fast-paced environment while maintaining a sense of commitment and be flexible to project needs. The position must be a team player and possess a sense of urgency to meet product requirements on schedule.

Requirements

Bachelor of Engineering (Packaging, Electrical, Mechanical, Materials or Chemical), Physics or Chemistry.
5 years of experience in electronics packaging with Bachelors (3yrs with Masters, with PhD). Work experience must include hands-on experience in specific packaging technology discipline.
Experience with package assembly process development.
Understands material properties and interactions with manufacturing processes.
Hands on experience with design tools such as AutoCAD and Cadence Allegro (or equivalent).
Demonstrated experience driving packaging technology developments.
Hands on experience with manufacturing equipment and processing.
Experience working with 3rd party suppliers.
Familiarity with DOE methodology.
Ability to present highly technical information to non-technical personnel.
Familiarity with Microelectronic packaging technologies such as flip chip bumping, wafer backend processing, SMT, flip chip attach, flux cleaning, overmold, package marking, dicing, test, and packaging for shipment.

Nice To Haves

MS preferred

Responsibilities

Responsible for design of bump, package, and assembly process flow for new products for use in high volume, high reliability, industrial, commercial, and automotive applications and will use data analysis to drive most decisions.
Contributes to a forward-looking packaging roadmap and aligns with product line roadmaps and other technology roadmaps.
Researches new packaging technologies and or suppliers to facilitate and propel product line roadmaps in a highly competitive market landscape.
Develops manufacturing processes and documents process capabilities in the form of design rules for product development teams.
Creates early concept sketches in support of technology recommendations, collects cost estimates in support of customer facing product opportunity pursuits.
Assists cross functional design teams with making appropriate design decisions related to packaging and assembly processes for both prototype and high-volume manufacturing.
Performs cost and risk assessments for new product designs against known design rules.
Detailed package design including the use of tolerance analysis and simulation tools to assess design integrity and performance for mechanical and thermal reliability as well as manufacturing producibility.
Prepares design documentation and bill of materials for both chip fabrication, backend wafer processes, and component assembly.
Execution of DoE experiments collecting characterization data to substantiate design decisions and mitigate technical risk to new products in development.
Collaborates with internal support personnel and other key supply chain partners including wafer fabs, offshore assembly and test contractors, and 3rd party service providers with service needs for specific technology or product developments.
Supports failure analysis and problem resolution in the development process or production environment
Mentor junior engineers in the packaging and assembly disciplines.