Senior Mixed Signal / Memory Circuit Designer
About The Position
We are looking for a Senior Mixed Signal / Memory Circuit Designer to help design and verify complete NVM IP macros for Mythic's product architecture using foundry NVM technologies. Participate in design and responsible for verifying complete IP macros specifically applicable for Mythic product architecture utilizing the available NVM (non-volatile memory) technologies from foundries. Involve in NVM architecture for optimum performance and area. Design and verify the new circuits to handshake with the analog computation blocks. Design, optimize and verify the NVM circuits including and not limited to high voltage generator block, x-path, y-path, test and peripheral circuits. Participate in RNM (Real Number Modeling) and functional model of NVM circuits for verification. Responsible for verifying the functional blocks and full chip level interfacing with NVM design. Work closely with the validation engineers to expedite the silicon evaluation process. Work closely with backend teams for the production qualification releases.
Requirements
- Ph.D. or MS degree in EE or related
- 3+ years industrial experience
- Hands-on experience in circuit design, full chip circuit simulation, debugging, and verification
- Excellent communication skills, ability to work well across multi-functional teams
- Fluent in all major CAD tools: SPICE, Cadence, Verilog simulation software
- Must be a self-starter, detail-oriented, and team player
Nice To Haves
- Hands-on experience in NVM embedded or NVM product (NOR, NAND, etc) is a plus
- Hands-on experience modeling circuits using Python, Verilog-A, and System Verilog
- Real Number Modeling is a plus
- Familiar and hands-on experience some memory circuit block design: decoder, high voltage switches, charge pumps, HV and LV regulator, bandgap, high performance low power sense amp, monitoring, and BIST capability is a plus
- Good understanding & knowledge of semiconductor device physics, and advanced process technology
- Experienced in design tapeout activities, layout supervision, silicon debugging
Responsibilities
- Participate in design and responsible for verifying complete IP macros specifically applicable for Mythic product architecture utilizing the available NVM (non-volatile memory) technologies from foundries
- Involve in NVM architecture for optimum performance and area
- Design and verify the new circuits to handshake with the analog computation blocks
- Design, optimize and verify the NVM circuits including and not limited to high voltage generator block, x-path, y-path, test and peripheral circuits
- Participate in RNM (Real Number Modeling) and functional model of NVM circuits for verification
- Responsible for verifying the functional blocks and full chip level interfacing with NVM design
- Work closely with the validation engineers to expedite the silicon evaluation process
- Work closely with backend teams for the production qualification releases
Benefits
- collaborative and respectful environment
- provide the tools and support they need
- equal opportunity and affirmative action employer
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What This Job Offers
Job Type
Full-time
Career Level
Senior
