Senior Manager, Electrical Engineering

L3Harris Technologies•Clifton, NJ

6d•$153,000 - $284,000•Onsite

About The Position

L3Harris EW in Clifton, NJ has an immediate need for a highly motivated FPGA, Electrical Engineering Senior Manager. In this role, you will lead a team of 6-8 engineers to develop, simulate, and integrate highly specialized firmware designs targeting electronic warfare systems in the lab. Responsibilities include generating firmware-derived requirements, architecting digital solutions to meet those requirements, and formal test/lab verification of the functional system. The qualified candidate will be able to work semi-autonomously as a lead designer, potentially driving a small team of firmware engineers through coding, simulation, code analysis, and circuit card design support. This role also involves oversight of a team of senior FW Engineers, partnering with programs to ensure correct staffing, adherence to engineering processes, and support for proposal efforts. It includes tracking the performance of the Clifton Electrical Engineering FW group, managing staffing, training, onboarding, employee development, engagement, and retention. Regular review of metrics to drive year-over-year performance improvement, serving as the FW functional representative for site-specific design reviews, and reviewing/approving proposals and Basis of Estimates (BOEs) are also key responsibilities. Additionally, this role provides technical evaluation and oversight of program execution, leads/participates in technical issue resolution teams, and ensures knowledge transfer and mentoring of less experienced engineers within the department.

Requirements

Bachelor’s Degree and a minimum of 12 years of prior relevant experience, or Graduate Degree and a minimum of 10 years of prior related experience.
Ability to obtain a Top-Secret security clearance.

Nice To Haves

System level knowledge of Electronic Warfare technology with a concentration in FPGA Firmware architecture development and support.
Experience and understanding of RF concepts and constraints including analog/digital conversion, channel bandwidth, resolution BW, noise, gain, and power.
Experience targeting VPX architecture and familiarity with SOSA standards.
Experience with High Complexity FPGA Digital Design Techniques and Devices.
Experience debugging down to the hardware level & experience using Signal Generators, Logic Analyzers, Digital Oscilloscopes and Embedded FPGA Debugging tools.
MATLAB signal processing and simulation
FPGA: Mentor Graphics HDL Designer, Mentor Graphics ModelSim/Questa, Synopsis Synplicity, Xilinx ISE, Xilinx Vivado, Altera Quartus.
FPGA: UVM, OVM, SystemVerilog, SystemC.
FPGA: Bring-up of advanced FPGA products like SoC, MPSoC, RFSoC, ACAP, etc.
General: Microsoft Office, DOORs (Requirement Specification and Tractability), Revision Control (GIT, etc.), JIRA, Confluence, Linux.
Model Based Systems Engineering (MBSE) methodology and tools (Cameo, etc.)
Programming in C, C++, Python, TCL.
Working knowledge of Circuit Card design: Schematic Entry, PCB/PWB Layout/Route.
Active TS/SCI Clearance.
MSEE or PhD, Computer Engineering or related field.

Responsibilities

Provide leadership and Subject Matter Expertise for the development of high reuse and easily extensible EW technology.
Develop Signal Processing Architectures targeting single chip and distributed chip low latency signal classification and countermeasures.
Work cross-functionally to adopt an efficient, common, mission-specific, best practices derived, development process.
Work with a variety of firmware, software, and systems development teams, assuring requirements are verified in a consistent fashion prior to firmware delivery to Integration.
Decompose and allocate system and box-level requirements to FPGA specifications.
Architect High Complexity solutions against requirements and implement those solutions in FPGA platforms.
Map FPGA simulation work products to system-level requirements and capabilities.
Refine and enforce efficient, effective, and consistent firmware development processes across FPGA designs.
Lead team of engineers generating FPGA design solutions, assuring adherence to best practices.
Ensure the FPGA simulations verify performance, then integrate and test the FPGA on the circuit card assembly.
Partnering with programs to ensure they are correctly staffed, engineering processes are being followed, and proposal efforts are supported.
Tracking performance of a Clifton Electrical Engineering FW group including staffing, training, onboarding, employee development, engagement and proactive retention.
Regular review of metrics to drive year-over-year performance improvement.
Serving as FW functional representative for site specific design reviews and review/approval of proposals and Basis of Estimates (BOEs) as needed.
Providing technical evaluation and oversight of program execution and leading/participating in technical issue resolution teams when required.
Ensuring knowledge transfer and mentoring of less experienced engineers occurs within the overall department.
Effective communicator with proven ability to deliver and sustain measurable results.