Senior Logic Design Engineer

IntelUs, CA
7dHybrid

About The Position

At Intel, we are driving cutting-edge innovation to transform technology and enrich lives globally. As an IP Logic Design Engineer, you will play a critical role in developing next-generation products and standard IPs that lead the industry in speed, efficiency, and cost-effectiveness. You will contribute to the development of silicon solutions that empower people's digital lives and address complex technical challenges that redefine technology. Your work will directly impact the integration and verification of world-class IP blocks into full chip designs, ensuring they meet strict quality and performance standards. Join us in pushing boundaries and driving innovation to build something truly wonderful.

Requirements

  • Bachelor's degree in Electrical Engineering , Computer Engineering, Computer Science, or in a related STEM field
  • 6+ years of experience with RTL design and System Verilog
  • 2+ years of e xperience in Advanced Microcontroller Bus Architecture ( AMBA ) protocols and coherent protocols such as CHI
  • Experience in hardware design, including logic design, state machines, control units, processor subsystems, and network-on-chip architectures
  • Experience with industry-standard tools and flows for front-end design, including one or more of the following ( synthesis, static timing analysis (STA), and /or Spyglass-based checks. )
  • Strong communication and collaboration skills, with the ability to influence and inspire cross-functional teams

Nice To Haves

  • Post Graduate degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field
  • Experience working on high-speed interconnects and I n-Die Interface ( IDI) protocol
  • Programming skills in languages such as Python or Perl

Responsibilities

  • Develop logic design, register transfer level (RTL) coding, and simulation for IP blocks and subsystems for integration in full chip designs
  • Define architecture and microarchitecture features and ensure their implementation in the block being designed
  • Optimize design logic to meet power, performance, area, and timing goals while maintaining design integrity for physical implementation
  • Review the verification plan and implementation to ensure design features are verified accurately and resolve issues in failing RTL tests
  • Drive quality assurance compliance to enable smooth IP-SoC handoff for high-quality integration and verification of IP blocks.
  • Collaborate with cross-functional teams to address security threat models and implement secure development practices within the design
  • Support SoC-level integration by working with IP providers to validate IPs and ensure seamless functionality

Benefits

  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
  • Find out more about the benefits of working at Intel .
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