Senior Integrated Circuit Digital Design Engineer

RTX • Goleta, CA

3d • Onsite

About The Position

At Raytheon, the foundation of everything we do is rooted in our values and a higher calling – to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering expertise to meet the needs of today’s mission and stay ahead of tomorrow’s threat. Our team solves tough, meaningful problems that create a safer, more secure world. Raytheon Vision Systems is seeking to hire a talented Digital Design Engineer to join our team. You will be part of a talented team designing next-generation digital visible and infrared image sensors. A successful candidate will excel at collaborating in a fast-paced multidisciplinary team environment working to develop cutting-edge image sensor products. As part of this team, you will be participating in mixed-signal ASIC/ROIC development activities with cross-functional teams including chip architecture, specification, design, verification, validation, fabrication, packaging, debugging, test development, failure analysis, and documentation. You will work to develop new digital block level microarchitecture, plan work breakdown structures and tasking, design digital logic blocks using Verilog and SystemVerilog HDL and utilize in-house digital IPs to extend functionality and/or to be compatible with new requirements for design reuse. You will perform Synthesis, Place & Route (P&R), Static Timing Analysis (STA) and post-P&R gate-level verification thus single-handedly covering all the steps in the digital design flow.

Requirements

• Experience with Digital Design and Signoff tools, such as Cadence Genus, Innovius, Conformal, Tempus, Voltus, or Synopsys Design Compiler, IC Compiler, Fusion Compiler, PrimeTime, TestMAX.
• Experience with TCL scripting, and Lint tools.
• Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 5 years of prior relevant experience.
• U.S. citizenship is required, as only U.S. citizens are authorized to access information under this program/contract.

Nice To Haves

• Familiarity with ROIC architecture, design concepts, operational control and timing.
• Experience writing behavioral models for digital circuits and analog/mixed signal interfaces and circuits.
• Experience with a Digital-on-Top mixed-signal design flow including utilization of Innovus for final chip construction.
• Experience with simulators like Spectre, Ultrasim, and CustomSim MS.
• or PhD in Electrical Engineering or Computer Science.
• Excellent communication (written and oral) and teamwork skills.

Responsibilities

• Design innovative Readout Integrated Circuits for cutting-edge imaging systems in a variety of CMOS nodes (from 180nm to 28nm).
• Write RTL using Verilog & SystemVerilog, construct testbenches to perform RTL simulation & verification, perform Synthesis, Static Timing Analysis, Place-and-Route, DFT (with use of scan chains), and Logical Equivalence Check
• Typically, you will be working as a solo digital designer on a project performing all the tasks listed above on your own. You must have both: Front-End Digital Design (RTL writing and verification) and Back- End Digital Design (Synthesis and Place&Route) skill-sets.
• You will train and guide junior engineers.

Benefits

• A total rewards package that goes above and beyond with compensation; healthcare, wellness, and work/life benefits; career development and recognition programs.
• Some of the benefits we offer include parental (including paternal) leave, flexible work schedules, achievement awards, educational assistance and child/adult backup care.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees