Senior Hardware Validation Engineer – FPGA & Networking

Team Red Dog•Redmond, WA

9d•Remote

About The Position

Team Red Dog is hiring a Senior Hardware Validation Engineer – FPGA & Networking for our client, a leading cloud and software provider and intelligent cloud leader. This highly technical engineering role offers the opportunity to validate next-generation Azure networking technologies by developing automated test frameworks, executing hardware validation, and driving debug and root cause analysis for FPGA and silicon-based networking platforms. Working alongside world-class hardware and software engineers, you'll play a critical role in ensuring the quality, reliability, and performance of accelerated networking solutions that power one of the world's largest cloud infrastructures.

Requirements

Hardware Validation Engineering (10+ years) – Extensive experience developing validation strategies, writing test plans, executing pre-silicon and post-silicon validation, debugging failures, and driving root cause analysis across complex hardware platforms.
Expert-level proficiency in C/C++, Python, and SystemVerilog to develop validation frameworks, automate test execution, create diagnostic tools, and analyze validation results.
Hands-on experience validating FPGA-based designs, accelerated networking solutions, and cloud networking technologies, with knowledge of RDMA, SR-IOV, TCP/IP, UDP, and related networking protocols.
Experience using networking validation platforms such as Ixia/CyPerf and collaborating with hardware, software, and design teams to identify, triage, and resolve complex system-level issues.
Bachelor's degree in Engineering or a related technical discipline.
10+ years of hardware validation or design verification experience.
Strong experience with pre-silicon and/or post-silicon validation methodologies.
Expert programming skills in C/C++, Python, and SystemVerilog.
Experience writing test plans, developing validation software, debugging failures, and performing root cause analysis.
Experience with networking validation tools such as Ixia or CyPerf.
Knowledge of advanced computer architecture.
Understanding of networking fundamentals including RDMA, SR-IOV, TCP, UDP, DTLS, and IP networking.
Excellent analytical, communication, collaboration, and problem-solving skills.
Ability to work independently while contributing effectively within highly collaborative engineering teams.
Must support Pacific Time working hours.
All applicants must be authorized to work in the U.S. without the need for sponsorship.

Nice To Haves

Experience with FPGA validation is strongly preferred.
Experience validating cloud hardware technologies such as NICs, GPUs, or similar high-performance platforms is preferred.
Familiarity with Assembly, SystemC, C#, and PowerShell is a plus.

Responsibilities

Develop comprehensive validation strategies, test plans, and automated test infrastructure for FPGA and silicon-based networking solutions.
Execute pre-silicon and post-silicon validation across multiple hardware product cycles.
Design, develop, and maintain validation software using C/C++, Python, and SystemVerilog.
Perform debugging, failure analysis, bug triage, and root cause investigations to resolve complex hardware and software issues.
Create stress, performance, congestion, and error-injection scenarios to validate system reliability.
Build reusable validation frameworks, automation, checkers, assertions, and testbench components.
Collaborate closely with hardware design, verification, firmware, and software engineering teams throughout product development.
Utilize networking validation tools such as Ixia and CyPerf to validate accelerated networking platforms.
Track validation coverage and ensure successful verification closure across assigned features.
Help influence future hardware designs by identifying issues early and providing technical feedback throughout development.