Senior Hardware Engineer

Everpure•Santa Clara, CA

1d•Onsite

About The Position

As a cornerstone of our Hardware Development Team, you will lead the evolution of Everpure’s high-performance systems from initial architecture to global production. You’ll bridge the gap between visionary design and rock-solid reliability, collaborating across Engineering, Operations, and JDM partners to redefine what’s possible in enterprise storage. Your mission is to deliver hardware that isn’t just fast, but inherently robust and scalable for the world’s most demanding data environments.

Requirements

Expert-level command of hardware design tools for schematic capture and PCB layout, coupled with a deep understanding of x86 architecture and high-speed signal integrity (SI) routing and analysis.
Proven ability to architect complex compute, storage, and I/O systems, with hands-on experience qualifying subcomponents such as SSDs, AC/DC power supplies, and VR circuits.
Proficiency in developing automated test environments using Python or Bash to streamline hardware configuration and validation processes.
Advanced knowledge of major bus technologies (PCIe, I2C, SPI) and high-speed Ethernet standards, with the ability to analyze protocol traces and electrical functionality at the component level.

Responsibilities

Architect and Design: Drive the full product development lifecycle for next-generation storage hardware, from schematic capture and PCB layout to the integration of complex x86 architectures and high-speed bus technologies.
Lead Hardware Validation: Design, implement, and automate sophisticated validation and qualification tests (including eDVT and system stress testing) to ensure every component meets Pure’s elite performance and reliability standards.
Solve Complex Technical Challenges: Conduct deep-dive root cause and failure analysis (FA) on hardware issues, utilizing high-speed oscilloscopes and bus analyzers to harden systems against real-world failures and customer escalations.
Optimize System Integrity: Audit and refine device-level power, signal integrity (SI), and thermal functionality, ensuring that high-speed interfaces (PCIe, Ethernet up to 800Gbps+) operate flawlessly under peak loads.