Senior Hardware Design Engineer

Fairchild Imaging, Inc.•San Jose, CA

4d•$180,000 - $200,000•Onsite

About The Position

Fairchild Imaging, headquartered in San Jose, California is a specialty image sensor design and manufacturing company with deep experience in developing leading edge performance CMOS image sensors. Our portfolio of image sensors can be found in many high-performance imaging applications like space exploration, medical x-ray, sciences, quantum computing, machine vision, low light, and 360 situational awareness. We are seeking an experienced Senior Hardware Design Engineer to lead the design and development of advanced PCB-based imaging platforms for next-generation CMOS image sensors, board-level cameras, and X-ray camera systems. This role requires deep expertise in high-speed digital hardware design, signal integrity, sensor integration, and system-level optimization for imaging performance and interface interoperability. In addition to hands-on technical leadership, this role may include responsibility for mentoring engineers, driving technical direction across projects, and contributing to team growth and engineering excellence.

Requirements

BS/MS in Electrical Engineering or related field.
8+ years of hardware design experience, including complex multilayer PCB design.
Proven expertise designing high-speed digital systems and high-density PCBs.
Demonstrated technical leadership, mentoring, or team lead experience.
Strong hands-on experience with CMOS image sensor integration and board-level camera development.
Experience with schematic capture and PCB layout tools such as Altium Designer, Cadence Allegro, or equivalent.
Hands-on lab debugging skills using oscilloscopes, protocol analyzers, logic analyzers, and related instrumentation.

Nice To Haves

Prior direct people management experience.
Experience with X-ray imaging systems or medical/industrial imaging electronics.
Familiarity with detector electronics, analog front ends, and low-noise sensor systems.
Experience supporting customer evaluation platforms and demo systems.
Knowledge of image quality characterization and hardware contributions to imaging artifacts.

Responsibilities

Provide technical leadership across hardware development programs for imaging and sensor-based products.
Mentor and guide junior and mid-level hardware engineers in schematic design, PCB layout, debug methodologies, and engineering best practices.
Lead hardware design reviews, architecture discussions, and cross-functional technical decision-making.
Establish and promote engineering standards for high-speed PCB design, signal integrity, documentation, and validation.
Support project planning, task prioritization, resource estimation, and execution tracking for hardware development activities.
May directly manage a small team of hardware engineers, including: goal setting and performance feedback, career development and coaching, hiring and onboarding support.
Architect, design, and validate high-performance PCBs for board-level camera systems supporting state-of-the-art CMOS image sensors.
Develop hardware platforms for: image sensor bring-up and debugging, electrical and optical characterization, internal evaluation platforms, customer demonstration systems.
Design interfaces and interconnects for high-speed sensor communication, including: SLVS/SLVS-EC, MIPI CSI-2 / D-PHY / C-PHY, LVDS and other high-speed serial interfaces.
Collaborate with sensor, firmware, software, and applications teams to ensure successful sensor integration and system functionality.
Optimize board architecture, power delivery, grounding, clocking, and layout to maximize sensor performance and minimize electrical noise.
Evaluate and mitigate hardware design impacts on end-user image quality, including: noise floor, fixed pattern noise, EMI/EMC coupling, timing integrity, power integrity artifacts.
Design and develop hardware platforms for X-ray camera systems integrating image sensors, detector electronics, and high-speed data interfaces.
Architect PCB solutions for sensor interface, power management, control electronics, and data acquisition subsystems.
Lead hardware development focused on robust USB-C interoperability, including: USB-C orientation support, enumeration and configuration reliability, sustained high-bandwidth streaming performance, cable and host interoperability robustness.
Analyze and debug signal integrity challenges across USB-C and other high-speed interfaces in demanding imaging applications.
Serve as subject matter expert in PCB design for high-speed/high-density electronics.
Perform and guide best practices for: signal integrity analysis, impedance control, differential pair routing, return path management, power integrity optimization.
Drive design reviews, schematic reviews, layout reviews, and hardware validation plans.
Support prototype bring-up, debug, failure analysis, and design iteration.