Senior Firmware Verification Engineer

Renesas Electronics•Austin, TX

3d•Onsite

About The Position

Renesas Electronics America is seeking a Senior Firmware Verification Engineer to join the Infrastructure Power team. This role owns pre-silicon verification of embedded firmware used to control high-performance power management ICs for data center, AI accelerator, networking, and computing platforms. The engineer will apply a solid understanding of the firmware development process to build effective test strategies, verify ARM Cortex-M firmware in simulation-based environments, and identify firmware, RTL, and interface defects before silicon availability.

Requirements

BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
Minimum 5+ years of experience in firmware verification, embedded firmware testing, firmware development, or pre-silicon verification.
Strong understanding of the embedded firmware development process and how requirements, architecture, implementation, integration, test, debug, and release activities connect.
Deep understanding of C and assembly-based firmware for ARM Cortex-M processors, including exception and interrupt handling, memory maps, startup code, registers, peripherals, and low-level debugging.
Proven firmware testing experience, including test planning, test-case design, negative and boundary testing, regression analysis, defect isolation, and coverage closure.
Strong ability to debug firmware–hardware interactions using simulation logs, waveforms, memory and register traces, and source-level analysis.
Proficiency in Python, Perl, or similar languages for verification automation and regression infrastructure.
Familiarity with embedded interfaces such as I2C, PMBus, SPI, UART, or similar protocols.
Strong analytical, problem-solving, written communication, and cross-functional collaboration skills.

Nice To Haves

Experience verifying PMIC firmware, digital power management, voltage regulation, sequencing, telemetry, or protection features.
Hands-on experience developing, maintaining, or debugging SystemVerilog-based pre-silicon simulation environments.
Experience with waveform and debug tools such as SimVision, Verdi, or similar tools.
Working knowledge of RTL design and firmware-controlled digital subsystems.
Experience with CI/CD pipelines, automated regression farms, test dashboards, and scalable failure-triage workflows.
Experience improving firmware testability through assertions, monitors, scoreboards, reference models, hooks, or diagnostic instrumentation.
Post-silicon bring-up or lab-debug experience is beneficial but is not the primary focus of this role.
Experience with QEMU, emulation, FPGA-based prototyping, virtual platforms, or other pre-silicon execution environments.
Exposure to UVM or other structured verification methodologies and coverage-driven verification.

Responsibilities

Build, maintain, and enhance SystemVerilog-based simulation environments that execute ARM Cortex-M firmware with the associated RTL and hardware models.
Verify firmware behavior across reset, boot, initialization, configuration, sequencing, telemetry, protection, fault handling, recovery, and firmware–hardware interface scenarios.
Analyze C and assembly firmware at source, instruction, register, memory, interrupt, and peripheral levels to diagnose functional and timing-related failures.
Develop directed, constrained-random, negative, stress, boundary, and error-injection tests to validate expected behavior and robustness.
Run regressions; triage failures; perform waveform, log, memory, and register analysis; and isolate issues to firmware, RTL, models, testbench, or tools.
Define and track requirements coverage, functional coverage, code coverage, and regression quality; identify gaps and drive closure.
Create automation using Python, Perl, or similar scripting languages for build and test execution, result checking, log parsing, failure classification, reporting, and continuous integration.
Collaborate closely with firmware developers, RTL designers, architects, and validation engineers to review requirements, improve observability and controllability, reproduce defects, and verify fixes.
Document verification plans, test procedures, coverage results, debug findings, known issues, and release-readiness assessments.