Senior Firmware Engineer

Avispa Technology•Tucson, AZ

1d•Onsite

About The Position

A leading biotechnology company is seeking a Senior Firmware Engineer to design and build robust embedded solutions at the intersection of hardware and software. This role focuses on developing high-performance, memory-efficient firmware, supporting hardware integration, and driving system-level reliability within a cross-functional agile environment.

Requirements

5+ years of professional experience in embedded firmware/software, systems development using C/C++.
Strong experience designing scalable firmware architectures, including memory management, interrupt handling, and state machines.
Hands-on experience with low-level communication protocols (I2C, SPI, UART, CAN, USB).
Proficiency with debugging tools and techniques for hardware-software integration issues.
Experience working in cross-functional teams and agile development environments.

Nice To Haves

Experience using Python for automation, testing, or data analysis is preferred.
Familiarity with RTOS environments (RTOS & Bare Metal), such as FreeRTOS or Zephyr, is preferred.
Experience working within SAFe or similar agile frameworks for hardware development is preferred.
Demonstrated ability to lead projects or mentor junior engineers is preferred.
Strong communication skills with the ability to explain complex technical concepts to diverse stakeholders are preferred.

Responsibilities

Design and implement embedded firmware features using C/C++, optimizing performance for constrained environments including CPU, memory, and power limitations.
Develop low-level drivers and middleware to interface with sensors, actuators, and communication peripherals such as I2C, SPI, UART, CAN, and USB.
Build and maintain automated testing frameworks (primarily in Python) for Hardware-in-the-Loop (HIL) validation and system-level testing.
Collaborate in agile planning, backlog refinement, and cross-functional discussions to break down complex hardware-software features and ensure alignment with system architecture and timelines.
Lead technical code reviews, troubleshoot hardware-software interactions using debugging tools (JTAG/SWD, oscilloscopes, logic analyzers), and support system integration and stakeholder demonstrations.