Senior Embedded Software Development Engineer

Microsoft•Redmond, WA

10d

About The Position

Microsoft is the world’s center of expertise on topological quantum computing. We are building a scaled, fault‑tolerant quantum computer grounded in topological qubits and integrated end‑to‑end with the Azure Quantum software stack. As a Senior Software Development Engineer in our Quantum Systems organization, you will develop core embedded software that powers Microsoft’s custom quantum readout instruments. This role focuses on building reliable, high‑performance userspace C++ systems that interface directly with Field Programmable Gate Array (FPGA) and System on a chip (SoC)‑based hardware used to operate and measure topological qubits. Our work sits at the intersection of hardware, software, and physics. You will collaborate closely with quantum experimentalists, FPGA engineers, and software partners to turn cutting‑edge research systems into robust, repeatable, and observable instrument platforms. At Microsoft Quantum, our mission is to empower science and scientists to solve the world’s hardest problems by realizing advanced computing platforms at the intersection of high‑performance computing, artificial intelligence (AI), and quantum information technology. Learn more at: https://www.microsoft.com/en-us/quantum. If you enjoy solving complex systems problems at the hardware–software boundary and using modern tools (including AI) to go faster, we’d love to talk.

Requirements

Doctorate in Physics, Engineering, or related field AND 1+ year(s) experience in industry or in a research and development environment, could include completion of a post doctoral research position OR Master's Degree in Physics, Engineering, or related field AND 4+ years experience in industry or in a research and development environment OR Bachelor's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment OR equivalent experience.
Ability to meet Microsoft, customer, and/or government security screening requirements is required for this role, including: Microsoft Cloud Background Check (upon hire and every two years thereafter)
Citizenship and Citizenship Verification: This role may require access to export‑controlled information under applicable regulations (e.g., ITAR, EAR). Eligibility will be assessed in accordance with legal requirements.
Ability to leverage AI tools to drive innovation and efficiency (e.g., performance modeling and analysis, research gathering, day to day task automation).
Familiarity with designing and building AI agents/copilots that assist with design, development, experiment setup, log triage, report generation, specification generation, and knowledge retrieval (e.g. instrument manuals, design docs).

Nice To Haves

5+ years of C++ development experience (C++17 or later) with proficient fundamentals in modern C++ design and memory management.
Experience developing userspace software on Linux, including interaction with device drivers and system services.
Experience building multi‑threaded or concurrent systems and reasoning about synchronization, performance, and correctness.
Experience interfacing software with hardware using memory‑mapped I/O, DMA, or similar mechanisms.
Experience building or maintaining networked services using Transmission Control Protocol/Internet Protocol (TCP/IP) and binary protocols.
Experience using CMake and standard debugging tools (e.g., gdb, core dumps) in Linux environments.
Experience with embedded Linux on ARM platforms (e.g., Xilinx Zynq UltraScale+), Yocto, or PetaLinux.
Experience with scientific, Radio Frequency (RF), or signal‑processing‑adjacent instrumentation (ADC/DAC, data acquisition, timing systems).
Experience designing observable and reliable systems (telemetry, health checks, watchdogs, post‑mortem analysis).
Experience building simulation or mock layers to enable CI and development without hardware.
Familiarity with Python for tooling, automation, or client‑side integration.
Exposure to quantum computing, quantum control systems, or advanced research instrumentation.

Responsibilities

Own embedded instrument software components: Design, develop, test, and maintain critical userspace C++ services that control and operate quantum readout instruments, with accountability for quality, performance, and reliability.
Deliver high‑performance data paths: Build and optimize near‑real‑time data pipelines from FPGA/SoC hardware to client software, including Direct Memory Access (DMA)‑based transfers, buffering strategies, and latency‑sensitive execution.
Drive hardware–software integration: Implement and debug interfaces to FPGA and SoC components using Memory-Mapped I/O (MMIO), interrupts, and driver Application Programming Interfaces (APIs), working closely with hardware and FPGA engineers to resolve integration issues.
Build networked, multi‑client services: Develop robust C++ services that support multiple concurrent clients, versioned binary protocols, and service discovery across lab and deployment environments.
Engineer for reliability and diagnosability: Design structured logging, telemetry, health monitoring, and crash diagnostics to support long‑running, remotely operated instruments.
Enable efficient testing and iteration: Develop simulation and mock modes for hardware‑dependent code, contribute to Continuous Integration (CI) and hardware‑in‑the‑loop testing, and validate changes across software and FPGA boundaries.
Collaborate across disciplines: Partner with experimentalists, control/readout engineers, FPGA teams, and client developers to deliver integrated solutions, leveraging modern and AI‑assisted tools to accelerate development.
Embody our Culture and Values