Senior Director, Silicon Hardware Engineering - Boards, Packaging, & Reliability

Altera•San Jose, CA

3d•$231,500 - $335,000•Onsite

About The Position

Altera is seeking a seasoned and technically deep engineering leader to serve as Senior Director of Silicon Hardware Engineering – Boards, Packaging & Reliability. This role involves leading a global, distributed organization responsible for chip package development, board hardware development, and silicon power and reliability engineering. The leader will report directly to the VP of Engineering and will be accountable for defining and executing the technical strategy, development methodologies, and organizational capabilities to deliver high-performance, reliable silicon hardware solutions at scale. The ideal candidate will possess hands-on technical expertise and sound engineering judgment in advanced semiconductor technologies, coupled with a proven track record of operational excellence, cross-functional collaboration, and building and leading high-performing engineering organizations across U.S. and Asia sites.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or closely related field required; Master's Degree preferred.
15+ years of progressive experience in semiconductor hardware engineering, with at least 5 years in a senior leadership or director-level role.
Demonstrated experience managing global, cross-functional engineering teams across U.S. and Asian sites.
Deep technical expertise in chip package development, including advanced packaging, substrate design, and OSAT management.
Proven experience in chip board hardware development, including schematic design, PCB layout, and bring-up.
Strong hands-on background in signal integrity and power integrity analysis and methodologies, including experience with industry-standard tools such as Ansys SIwave, Cadence Sigrity, HyperLynx, or equivalent.
Solid understanding of silicon design development methodologies, including synthesis, place and route (P&R), timing closure, and DFT.
Track record of delivering measurable cost-reduction programs across package and board hardware while maintaining product quality and technical requirements.
Experience managing and qualifying multiple external vendors and OSATs simultaneously.
Demonstrated ability to drive complex engineering programs and technical decisions across organizational boundaries.
Excellent communication, influencing, and executive presentation skills.

Nice To Haves

Master's Degree preferred.

Responsibilities

Lead, develop, and scale three core engineering functions: chip package development, board hardware development, and silicon power and reliability engineering.
Build, mentor, and develop high-performing engineering teams distributed across the U.S. and Asia, fostering a collaborative, accountable, and results-driven culture.
Partner closely with VP/SVP leadership to define multi-year technical roadmaps, headcount plans, and organizational strategy.
Establish clear goals, KPIs, engineering standards, and performance expectations across all teams.
Drive technical and organizational alignment across the three functions to improve execution, quality, and predictability across product programs.
Define and drive technical direction for advanced package technologies including 2.5D/3D IC, flip-chip, and high-density interconnect.
Oversee board-level hardware development from concept through bring-up, ensuring design-for-manufacturability and design-for-test.
Champion rigorous signal integrity (SI) and power integrity (PI) methodologies, ensuring consistent engineering standards and adoption of best-in-class EDA tooling across teams.
Lead silicon power and reliability programs including power budgeting, electromigration, ESD, and reliability qualification.
Apply deep knowledge of silicon design development methodologies to improve tapeout quality, schedule, and first-pass silicon success rates.
Drive disciplined technical reviews and engineering decision-making across package, board, SI/PI, power, and reliability activities to identify and mitigate product risks early.
Own end-to-end engineering program execution across multiple concurrent programs, driving on-time and on-budget delivery.
Develop and execute cost-reduction strategies across packaging, board materials, and test processes without compromising quality or product requirements.
Manage complex, multi-vendor relationships with OSATs, PCB fabricators, substrate suppliers, and EDA vendors.
Implement robust supplier qualification, scorecard, and escalation processes to ensure supplier performance and supply chain resilience.
Drive continuous improvement in cycle time and cost through data-driven operational reviews.
Establish clear execution metrics, risk-management mechanisms, and escalation paths to improve predictability across development programs.
Serve as the primary engineering interface for internal customers including silicon architecture, SoC design, system integration, and product management teams.
Partner across engineering functions to ensure package, board, power, reliability, and silicon development requirements are aligned throughout the product-development lifecycle.
Represent hardware engineering in executive reviews, customer engagements, and technology partnership discussions.
Communicate complex technical tradeoffs and associated cost, schedule, quality, and product implications clearly to non-technical stakeholders and senior leadership.