Senior Director Power Architecture, Datacenter AI

QualcommSan Diego, CA
$249,900 - $375,800

About The Position

As a Data Center AI Pre and Post Silicon Power Lead, you will work to define and validate the power consumption targets of product under planning from IP, SoC, card to rack scale. You will help set up methodologies, develop validation and benchmarking plans, recommend tuning optimizations, and ensure that the silicon/system under development meets the highest power efficiency. You will also participate in architecture and product definition feedback for the next generation of AI accelerators by closing the loop with real silicon analysis.

Requirements

  • Bachelor's degree in Science, Engineering, or related field and 10+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 9+ years of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.

Nice To Haves

  • Bachelor or Masters Degree in Computer or Electrical Engineering
  • 12 to 15+ years of practical experience in pre and post silicon performance and power analysis of SoCs
  • Strong programming/scripting skills (C/C++, Python scripts)
  • Strong familiarity with Data Center workloads, including compute, memory, and IO bound workloads
  • Strong analytical skills for test plan creation and debug
  • Strong communication and collaboration skills
  • Must excel in a dynamic team working environment
  • Must be a self-starter and be able to independently drive tasks to completion
  • Proven understanding of AI SoC, memory hierarchy, system interconnects.
  • Experience with platform benchmarking and knowledge of performance/power workloads
  • Experience with power analysis methods and comprehensive understanding of power consumption
  • Power management methodologies and deep understanding of tuning and optimization
  • Computer hardware and architecture (experience with datacenter servers a plus)

Responsibilities

  • Characterize Data Center workloads on system to provide inputs into pre-Si modeling and projection
  • Define end-to-end power analysis plans for complex Datacenter AI systems
  • Debug issues found during pre-silicon, bring-up, validation, and production phases of SOC programs
  • Define an optimization strategy that delivers world class datacenter AI efficiency
  • Lead collaborative test approach with multiple teams, and tracking test execution to make sure all features are performant and power optimized on time
  • Work closely with supporting teams in design, architecture, emulation, firmware, design verification and software to ensure readiness for first silicon arrival, evaluation of AI and system performance upon silicon arrival, and evaluation of critical AI workloads
  • Develop deep knowledge of AI infrastructure architecture, SoC system architecture, system benchmarking techniques, and power reduction and optimization methods
  • Drive technical innovation to enhance capabilities in system power validation including tools and script development, technical and procedural methodology enhancement, and various internal and cross-functional technical initiatives

Benefits

  • competitive annual discretionary bonus program
  • opportunity for annual RSU grants
  • highly competitive benefits package
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