Senior Digital Signals Processing and Algorithms Engineer

Quartermaster

23h

About The Position

Quartermaster AI is seeking an experienced RF/DSP Engineer to build the digital signal processing foundation of our radiofrequency sensing platform. This is a ground-floor role: our DSP pipeline is early-stage, and you will build the primary architecture and implementation of the algorithms that turn raw RF into maritime domain awareness and insights. You will work closely with our RF hardware and embedded systems engineers to implement signal processing algorithms on edge compute hardware, and with ML/AI engineers to deliver conditioned, feature-rich data that feeds downstream detection and classification pipelines.

Requirements

• 5+ years of hands-on DSP algorithm development for RF applications.
• Strong proficiency in C/C++ for performance-critical, embedded or near-real-time signal processing.
• Demonstrated experience implementing and validating geolocation algorithms.
• Deep understanding of spectral analysis, digital filtering, synchronization, and coherent signal processing fundamentals.
• Experience with software-defined radio platforms and IQ data processing workflows.
• Proficiency in Python for algorithm prototyping, simulation, and test automation.
• Active Secret clearance or demonstrated ability to obtain one.

Nice To Haves

• Bachelor's or Master's degree in Electrical Engineering, Signal Processing, Applied Mathematics, or a closely related field.
• Familiarity with FPGA DSP pipelines (HLS, IP cores, or HDL-level signal processing integration).
• Experience building DSP algorithms or pipelines for RF signals in the maritime domain.

Responsibilities

• Design and implement the end-to-end DSP pipeline from raw IQ sample ingestion through spectral analysis, channelization, filtering, and feature extraction.
• Implement and validate algorithms multi-sensor RF geolocation algorithms.
• Build and maintain signal detection, framing, and classification primitives that serve as inputs to downstream ML pipelines.
• Write optimized signal processing code in C/C++ targeting embedded processors and FPGA soft-core environments on edge hardware.
• Experience porting DSP workloads to server-class or cloud compute environments.
• Profile and optimize algorithms for latency, throughput, and power within tight edge compute budgets.
• Define and implement data pipeline interfaces between the edge layer and cloud/server-side processing, including IQ data formatting, metadata schemas, and transport protocols.
• Contribute to system-level design reviews, interface control documents, and technical roadmap planning.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior