Senior Design Engineer

Micron Technology • San Jose, CA

1d • Onsite

About The Position

As a Sr. or Staff Design Engineer in the NVE Design Engineering Analog group at Micron Technology, Inc., you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing analog and mixed circuits used in the development of memory products! What’s Encouraged Daily! Design, simulate, optimize, and floorplan NAND analog and mixed‑signal circuits, including circuits that support dual‑mode operation for both storage and compute‑in‑memory use cases. Evaluate design feasibility and analyze circuit functionality across conventional memory operation and CIM‑enabled modes, accounting for accuracy, linearity, latency, power, and device variability. Design, simulate, and validate high‑performance ADC architectures (e.g., SAR, pipeline, or hybrid) for NAND sensing and mixed‑signal interfaces, optimizing resolution, speed, power, and area across PVT and mismatch. Implement analog and mixed‑signal circuit designs to meet specifications in areas such as sensing, amplification, bias generation, regulation, accumulation, and signal conditioning, with consideration for compute‑oriented extensions (e.g., multi‑level sensing, charge/current‑domain computation, or local analog processing). Validating design performance and functionalities by running block and chip level simulations using standard industry simulators. Working closely with other functional teams to evaluate, analyze, and improve NAND power consumptions. Collaborate productively with other team members in your team. Review existing and generate new technical documentation. Build and maintain Python-based AI utilities that interface with EDA environments to accelerate design tasks such as environment setup, corner execution, regression runs, automated documentation and intelligent/predictive design/layout techniques. Work with and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly, and Marketing to proactively design products that enable manufacturable, testable, and scalable CIM features, optimizing cost, quality, reliability, time‑to‑market, and customer satisfaction.

Requirements

• MS in electrical engineering required.
• 4+ years of NAND design relevant industry experience required with prior CIM projects led or contributed.
• A high level of self-motivation.
• Proficiency in analog/mixed signal circuit design (charge pumps, op amps, DACs, ADCs, linear regulators, oscillators, bandgaps) with focus on ADC design.
• Good fundamentals in semiconductor and device physics and analog/mixed-signal circuit design.
• An understanding of semiconductor reliability issues including CHC, NBTI, stress, and snapback, as well as Electromigration (EM) and IR analysis.
• Strong circuit debugging and problem-solving skills.
• Experience of circuit verification and optimization, layout planning, parasitic extractions of the circuits, experience guiding layout.
• Strong coding skills in Python (plus Bash/Tcl a bonus), and comfort working with structured data (CSV/JSON/SQLite) and version control.
• Excellent teamwork attitude.
• Good verbal communication skills (English) and ability to convey complex technical concepts in verbal and written form.

Nice To Haves

• PhD preferred
• Knowledge of analog and digital simulators such as HSPICE, Fast SPICE, and Verilog
• Familiarity with Cadence design, LVS/DRC tools (a plus).
• Experience with a scripting language.
• Familiarity with Linux/UNIX

Responsibilities

• Design, simulate, optimize, and floorplan NAND analog and mixed‑signal circuits, including circuits that support dual‑mode operation for both storage and compute‑in‑memory use cases.
• Evaluate design feasibility and analyze circuit functionality across conventional memory operation and CIM‑enabled modes, accounting for accuracy, linearity, latency, power, and device variability.
• Design, simulate, and validate high‑performance ADC architectures (e.g., SAR, pipeline, or hybrid) for NAND sensing and mixed‑signal interfaces, optimizing resolution, speed, power, and area across PVT and mismatch.
• Implement analog and mixed‑signal circuit designs to meet specifications in areas such as sensing, amplification, bias generation, regulation, accumulation, and signal conditioning, with consideration for compute‑oriented extensions (e.g., multi‑level sensing, charge/current‑domain computation, or local analog processing).
• Validate design performance and functionalities by running block and chip level simulations using standard industry simulators.
• Work closely with other functional teams to evaluate, analyze, and improve NAND power consumptions.
• Collaborate productively with other team members in your team.
• Review existing and generate new technical documentation.
• Build and maintain Python-based AI utilities that interface with EDA environments to accelerate design tasks such as environment setup, corner execution, regression runs, automated documentation and intelligent/predictive design/layout techniques.
• Work with and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly, and Marketing to proactively design products that enable manufacturable, testable, and scalable CIM features, optimizing cost, quality, reliability, time‑to‑market, and customer satisfaction.

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Senior