Senior Debug Tools Engineer

Microsoft•Hillsboro, OR

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and is responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for the design, development, manufacturing, and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. The DFX (Design for Test & Debug) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale, and sustainability related to Microsoft cloud hardware. We are looking for a Senior Debug SW Tools Engineer to join the team to support our mission as a key role in ensuring Silicon quality.

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role.
This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.
As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information.
To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport.
Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Nice To Haves

Experience debugging embedded systems, firmware, operating systems, or SoC platforms involving hardware-software integration.
3+ years of programming experience in C/C++ and Python for software development, automation, tooling, or embedded systems.
3+ years of hands-on experience using hardware/software debug tools such as OpenOCD, TRACE32, Arm Development Studio, GDB, or equivalent debugging environments.
Experience with Arm architecture, Armv8/Armv9 processors, CoreSight, DAP, ETM, or related debug and trace technologies.
Knowledge of Design for Debug (DFD), Design for Test (DFT), scan dump analysis, crash dump collection, or silicon validation methodologies.
Experience with server-class SoCs, platform bring-up, firmware development, or post-silicon validation.
Experience with Linux kernel debugging, perf, OS based trace, and system performance analysis tools.
Familiarity with AMBA protocols such as AXI, AHB, and APB.
Experience developing automation frameworks and scalable engineering productivity tools.
Experience with firmware bring-up and debugging using UART logs and low-level system diagnostics.
Background in Python-based AI development, diagnostic analytics, LLMs, RAG, and large-scale debug data processing could significantly accelerate development of next-generation silicon triage capabilities.

Responsibilities

Design, develop, validate, and maintain silicon debug tools and automation frameworks used during pre-silicon and post-silicon bring-up of Microsoft server-class SoCs.
Develop and enhance debug workflows leveraging OpenOCD, Lauterbach TRACE32, JTAG/DAP infrastructure, and related run-control technologies to improve debug efficiency and engineering productivity.
Create software utilities, automation scripts, and diagnostic tools using C/C++, Python, and related technologies to support firmware bring-up, silicon validation, crash analysis, and system debugging.
Partner closely with silicon architecture, DFT, firmware, validation, platform, and operating system teams to investigate complex hardware-software interactions, root-cause issues, and drive corrective actions.
Enable advanced debug capabilities including Coresight-based debug, trace collection, register and memory access, scan dump analysis, UART-based bring-up, crash dump collection, and remote debugging solutions.