Senior Computer Infrastructure Support Engineer

RTX•Marlborough, MA

6d•Onsite

About The Position

This position is intended to split time between Linux system administration of high-performance processing platforms and supporting testing of specialized hardware. The ideal candidate has some software development education or experience. The Receiver Exciter and Processing Architecture (REPA) Department's primary goal is to design, architect, and implement signal processing algorithms on a variety of high-performance processing platforms – including CPUs, FPGAs and GPUs, on COTS and semi-custom hardware platforms, for next generation radar systems deployed on land and sea.

Requirements

Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 5 years of prior relevant experience.
Experience administrating Linux operating systems.
Experience with x86 computer hardware, preferably datacenter grade.
Experience with scripting (shell, bash, python).
U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance.
The ability to obtain and maintain a U.S. government issued security clearance is required.
Active and existing security clearance required after day 1.

Nice To Haves

CompTIA Linux+ certification.
Experience with automation tools/frameworks (Terraform, Ansible, Chef, GitLab, Gitlab Runner).
Experience with observability tools such as Grafana, Telegraf, and Prometheus
Experience with developer tools (Git, Jenkins, Artifactory, Jenkins, Jira).
Experience with Agile methodologies (Scrum, Kanban).
Experience with C++.
Radar or DSP knowledge.

Responsibilities

Work in team of HW and SW engineers to support hardware build, integration, and test of custom processing hardware.
Provide IT systems administration in a RedHat Enterprise Linux environment for realtime systems.
Ethernet and Infiniband network configuration, maintenance and troubleshooting.
Write and execute python and bash scripts to support verification testing and to automate procedures.
Develop integration and test plans, procedures, and conduct execution of functional, performance, and environmental testing at the subsystem level.
Log hardware metrics and present results on power, cpu and memory usage, cpu temperature, and network throughput.
Update FPGA firmware using Quartus.
Assist in architecting hardware systems to meet performance needs.