Senior Compiler Engineer

Ericsson•Austin, TX

6d•Onsite

About The Position

We are building an MLIR-based compiler and inference stack for custom AI silicon used in telecommunications baseband processing. The compiler takes ML models from StableHLO through orchestration, tiling, memory planning, and code generation onto a multi-core processor architecture with custom accelerators. We already have a working proof point. Real workloads are running on custom silicon at competitive perf-per-watt, and we are building the general-purpose compiler stack around it. This is a small team building something real, not a research project. We are hiring a Staff or Senior Compiler Engineer to work across the compiler stack. You will design and implement MLIR passes, debug IR transformations, optimize for real hardware constraints, and contribute wherever the hardest problems are, whether that is model import, scheduling, memory allocation, or code generation. You will work directly with hardware architects, runtime developers, and AI researchers, and you will help shape the compiler as it matures.

Requirements

Strong C++ development experience
Hands-on experience with MLIR, LLVM, or another production compiler framework
Experience implementing compiler passes or transformations at production quality
Understanding of intermediate representations and compiler pipelines
Ability to work across abstraction layers, from ML operator semantics to hardware constraints
Track record of owning technical work end-to-end, from design through delivery

Nice To Haves

StableHLO, XLA, JAX, PyTorch, or ONNX model lowering
Custom MLIR dialect development
DSP, VLIW, or AI accelerator compilation
Static scheduling or software-managed memory
Tiling, loop transformations, or data-layout optimization
Quantization or mixed-precision lowering
Bare-metal or embedded runtime integration
Depth in one area matters more than breadth across all of them.

Responsibilities

Design and implement MLIR transformation passes, dialect conversions, and lowering pipelines
Work on tiling, scheduling, vectorization, and memory-planning problems specific to the target hardware
Debug numerical correctness issues across compiler transformations
Develop and maintain compiler testing and validation infrastructure
Contribute to hardware-software co-design discussions as the compiler matures
Profile, analyze, and optimize compiled workloads on silicon
Own the design and implementation of significant compiler subsystems

Benefits

Choice of three medical plan options
Dental plan option
401(k) Plan with automatic 3% company contribution
401(k) match $1 for every $1 you put into the 401(k) Plan on the first 3% of your eligible pay, plus 50 cents on every $1 on the next 2% of eligible pay
Company credits equal to the cost of basic life insurance and basic accidental death and dismemberment coverage
Company credits equal to the cost of short-term and long-term disability coverage
Option to participate in Ericsson’s Stock Purchase Plan
Minimum of 15 days of accrued vacation
Up to 3 personal days per year
11 annual holidays
8 hours of volunteer time
80 hours of sick time annually
Up to 16 weeks of paid maternity leave
6 weeks of parental or adoption leave at 100% of pay
Financial wellness programs
Educational assistance
Matching gifts
Recognition programs