Senior CAD Engineer, Silicon, Google Cloud

Google•Sunnyvale, CA

5d•$163,000 - $236,000

About The Position

As a Senior Engineer on Google's Silicon team, you will help deliver products that have a substantive impact on Google's technical infrastructure. You will provide leadership to hardware engineers in a fluid environment focused on chip-design infrastructure, and lead technical projects from concept and planning through execution and closure. You will help deliver designs that work the first time and lead chip-design process improvement projects across multiple areas of expertise. The role focuses on shaping AI/ML hardware acceleration and developing custom silicon for Google's TPU technology. You will apply design and verification expertise to complex digital designs, particularly TPU architecture and its integration into AI/ML-driven systems. The AI and Infrastructure team delivers AI and infrastructure capabilities at scale for Googlers, Google Cloud customers, and Google users worldwide. The listed U.S. pay range is $163,000–$236,000, plus a 15% bonus target, equity, and benefits. Individual pay depends on job-related skills, experience, and relevant education or training.

Requirements

Bachelor's degree in Electrical Engineering, Computer Science Engineering, or equivalent practical experience.
5 years of experience working with computer-aided design (CAD).
Experience with SystemVerilog, hardware design, automation, and design verification test.
Experience developing tools in one or more programming languages such as Python or C/C++.

Nice To Haves

Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Experience planning and deploying new tools and flows to users.
Knowledge of the chip design process for design and verification.
Ability to present and explain novel methods to users.
Experience automating EDA flows using Python, AI, and related software engineering skills.

Responsibilities

Lead CAD methodology engineers supporting chip RTL or Design Verification (DV) teams, and manage and mitigate support issues for tool flows.
Partner with chip project teams to influence and standardize methodology across functional areas and geographies.
Perform or guide technical evaluations of tools for possible deployment.
Collaborate with teams across Google to identify and create opportunities to improve chip design across Google.
Participate in design reviews, track issue resolution, and engage in technical and schedule trade-off discussions.
Lead technical projects from concept and planning through execution and closure.
Lead chip-design process improvement projects across multiple areas of expertise.