This individual independently plans, performs the moderately-defined responsibility for the application of hardware and software knowledge to assist and support the defining, modeling, designing (digital and/or analog), optimizing, verifying, validating, implementing, and documenting of IP (block/SoC) development for a variety of high performance, high quality, low power products. Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable architecture and design of a specific part of a block/SoC or IC Package. Writes technical documentation for CAD/EDA/IP/ASIC projects. Develops scalable automation solutions in the area of RTL design and SoC integration, power, verification, and emulation with various programming languages and databases. Resolves issues in all phases of development to assure smooth project execution with strong problem solving and debugging skills by analyzing a large set of RTL designs in various design databases. Acts as a strong contributor at design reviews and project meetings.
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Job Type
Full-time
Career Level
Senior