We are seeking a Senior ASIC VLSI Synthesis and Design Engineer with a strong background in synthesis and timing closure for large-scale designs. The ideal candidate will have extensive experience with deep submicron technology and a proven track record in RTL coding, constraint development, gate-level simulation, STA, and power-aware synthesis. This role also requires robust post-silicon debug and validation skills, including production bring-up and failure analysis. Proficiency in scripting languages for automation and flow optimization is essential, as are excellent problem-solving and collaboration skills.
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Job Type
Full-time
Career Level
Senior