Senior ASIC Hardware Design Engineer

NVIDIA•Westford, MA

1d•$136,000 - $264,500

About The Position

NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading GPUs and SoCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company spanning product lines from consumer graphics to datacenter platforms, self-driving cars, and the growing field of artificial intelligence. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. As a member of the NVLink ASIC Design team, you will work with a worldwide team of architects and engineers dedicated to building high-speed chip-to-chip communication and high-performance, low-power GPU and interconnect subsystems. You will work closely with architects, design engineers, verification engineers, and physical design engineers to contribute to the design and development of next-generation NVLink protocol and GPU subsystem logic, delivering functional, performant, and physically implementable designs.

Requirements

A Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience and 5+ years of industry experience.
Solid practical understanding of Verilog and/or SystemVerilog.
Relevant project experience in micro-architecture and RTL development of complex designs.
Exposure to computer architecture and digital systems designs.
Highly proficient in logic development, Verilog and/or SystemVerilog, with an understanding of physical implementation and VLSI.
Strength in scripting languages such as Perl or Python.
Strong collaboration and communication skills.

Nice To Haves

Background with low-power build methodologies.
Experience with high-speed build methodologies.
Proven track record of successfully implementing complex designs.

Responsibilities

Engage in and support the design and development of NVIDIA’s next-generation NVLink protocol and GPU subsystem logic.
Contribute to micro-architecture development and document specifications of GPU and interconnect sub-systems.
Implement in RTL and debug while collaborating with the verification team to ensure that the design is functional and performant.
Apply logic design skills to optimize and meet performance and power goals.
Deliver a synthesis/timing clean design while collaborating with the physical design team to ensure a routable and physically implementable solution.
Support hardware engineering activities including chip floor plan, power/clock distribution, chip assembly, timing closure, power and noise analysis, and back-end verification.
Develop flows and tools as necessary in support of design activities.