Senior ASIC/FPGA Verification Engineer (Onsite)
RTX•El Segundo, CA
•$95,500 - $181,700•Onsite
About The Position
Collins Aerospace is seeking a highly skilled and innovative Senior ASIC/FPGA Verification Engineer to join our Applied Research and Technology (ART) Microelectronics Technology team. Your work will contribute to the development of cutting-edge defense solutions across Mission Systems, leveraging your expertise in chip-level verification methodologies of a wide variety of high-performance digital FPGAs & ASICs. This candidate will be onsite based out of our El Segundo CA, or Fullerton, CA office.
Requirements
- Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience
- Active and transferable U.S. government issued SECRET security clearance is required prior to start date
- Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
- Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog.
- Working knowledge of chip-level verification methodologies, including constrained-random testing, functional coverage, and assertion-based verification using SystemVerilog.
- Proficiency with revision control concepts and tools (e.g., Git, Subversion)
Nice To Haves
- Excellent communication and teamwork skills with the ability to work in a collaborative environment.
- Experience with high-speed digital interfaces and protocols (e.g., DDR, PCIe, Ethernet)
- Experience with ASIC/FPGA lab validation and debug using standard lab equipment
- Proficiency with industry-standard ASIC/FPGA simulation and synthesis tools such as QuestaSim, Synplify, Quartus, or Vivado
- Background in aerospace, defense, or mission-critical systems
- Proficiency with Unix/Linux environments, scripting or software development
Responsibilities
- Verification environment architecture and design using SystemVerilog with OVM/UVM
- Creation of written test plans, testcases, code coverage tracking, and functional coverage tracking
- Testbench development for the verification of RTL blocks using VHDL or SystemVerilog
- Collaborate with design engineers in the integration and validation of ASIC/FPGA solutions
- Provide technical guidance and mentorship to junior engineers
- May provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status
- Contribute to engineering estimates for new program pursuits.
Benefits
- Medical, dental, and vision insurance
- Three weeks of vacation for newly hired employees
- Generous 401(k) plan that includes employer matching funds and separate employer retirement contribution, including a Lifetime Income Strategy option
- Tuition reimbursement program
- Student Loan Repayment Program
- Life insurance and disability coverage
- Optional coverages you can buy pet insurance, home and auto insurance, additional life and accident insurance, critical illness insurance, group legal, ID theft protection
- Birth, adoption, parental leave benefits
- Ovia Health, fertility, and family planning
- Adoption Assistance
- Autism Benefit
- Employee Assistance Plan, including up to 10 free counseling sessions
- Healthy You Incentives, wellness rewards program
- Doctor on Demand, virtual doctor visits
- Bright Horizons, child and elder care services
- Teladoc Medical Experts, second opinion program
- Relocation assistance
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What This Job Offers
Job Type
Full-time
Career Level
Senior
