Senior ASIC Design Engineer

NVIDIA•Santa Clara, CA

22h•$136,000 - $264,500•Hybrid

About The Position

We are looking for a Sr. ASIC Design Engineer! NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have developed an outstanding team stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

Requirements

A Bachelors or Masters Degree (or equivalent experience)
5+ years of relevant / meaningful work experience
Proven hardware engineering background with a concentration in VLSI and Computer Architecture
Expertise in Verilog, System Verilog or similar HDL.
Proficient programming in Perl/Python (or similar scripting languages).
Experience with logic synthesis and timing analysis.
Exposure and firsthand work experience with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, GDB)
Experience with test bench environments for unit and system level verification.
Good debugging and analytical skills
Strong interpersonal skills and ability to work with on-site and remote teams

Nice To Haves

Additional experience working on embedded processors is a plus.
Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies is a huge plus.

Responsibilities

Document, implement, and deliver fully verified, high performance, area and power efficient RTL to achieve the design targets and specifications.
Architecture and micro-architecture design, RTL design and synthesis, and logic and timing verification using pioneering CAD tools and semiconductor process technologies.
Participate in the verification of the design using sophisticated verification methodologies.
Help define the verification scope and support the development of verification infrastructure.
Collaborate with several ASIC development teams and will need to communicate and coordinate with members of those teams, some of whom are in remote locations.