Senior ASIC Design Engineer

Fermilab•Batavia, IL

2d•$124,800 - $164,200•Onsite

About The Position

Fermilab is seeking a Senior Analog ASIC Design Engineer within our Microelectronics Department. The Senior Analog ASIC Design Engineer will lead the development of custom analog and mixed-signal integrated circuits for scientific instrumentation and microelectronics operating in extreme environments, including cryogenic temperatures and radiation. The successful candidate will contribute to all phases of ASIC development—from architecture and transistor-level circuit design through layout, silicon characterization, and system integration—while collaborating with multidisciplinary teams to deliver advanced and innovative solutions for next-generation scientific applications.

Requirements

PhD or MS in Electrical Engineering or Physics with background in solid state circuits and integrated circuit design.
2+ years (Ph.D.) or 5+ years (M.S.) of professional experience in analog integrated circuit design, including demonstrated involvement in one or more successful ASIC developments from design through tapeout and silicon validation.
Strong knowledge of analog CMOS integrated circuit design principles.
Working knowledge of mixed-signal ASIC design and integration.
Understanding of semiconductor device physics and analog circuit behavior.
Knowledge of the complete ASIC development flow from specification through silicon characterization.
Demonstrated experience designing transistor-level analog integrated circuits in CMOS technologies.
Experience designing several of the following: low-noise and operational amplifiers, comparators, references and bias generation circuits, high-performance data converters (ADCs, DACs, TDCs), timing and clock generation circuits, RF integrated circuits and analog front-ends.
Experience developing behavioral models (e.g., Verilog-A), simulation environments, and performing analog and mixed-signal simulations.
Experience with IC layout, physical verification (DRC/LVS), and post-layout extraction.
Experience with industry-standard IC design tools such as Cadence Virtuoso or similar EDA environment.
Experience performing DC, AC, transient, noise, corner, Monte Carlo, and stability analyses.
Experience developing ASIC test plans and supporting laboratory characterization, silicon debug, and performance validation.
Demonstrated experience contributing to successful ASIC tapeouts.
Ability to independently lead complex ASIC design activities while contributing effectively within multidisciplinary engineering teams.
Strong analytical, troubleshooting, and problem-solving skills.
Ability to communicate technical concepts clearly through technical discussions, documentation, and presentations.
Ability to mentor junior engineers and contribute to a collaborative research and development environment.
Ability to manage multiple technical priorities and work effectively on challenging research projects.

Nice To Haves

Experience with advanced CMOS technologies.
Experience designing ASICs for cryogenic, radiation-tolerant, or other extreme-environment applications.
Experience with low-noise, low-power, or precision analog circuit design.
Experience with sensor readout electronics, precision timing circuits, RF integrated circuits, or scientific instrumentation.
Record of technical publications, patents, or other demonstrated technical contributions.

Responsibilities

Lead the design and development of custom analog, RF, and mixed-signal ASICs from concept through silicon validation.
Develop system architectures, ASIC specifications, and circuit implementations based on application requirements and system-level performance objectives.
Design high-performance analog and RF building blocks, including low-noise amplifiers, operational amplifiers, precision references, bias circuits, comparators, timing circuits, data converters, clock generation circuits, power management circuits, and other custom analog subsystems.
Develop behavioral models (e.g., Verilog-A), simulation environments, and test benches to support mixed-signal verification, and perform circuit- and system-level simulations to validate design performance.
Perform transistor-level circuit design, simulation, optimization, and post-layout verification using industry-standard EDA tools.
Develop custom IC layouts and perform physical verification, including DRC, LVS, and post-layout extraction.
Collaborate closely with digital ASIC designers, system engineers, physicists, sensor developers, packaging engineers, and firmware developers to implement complete mixed-signal ASIC solutions.
Develop ASIC test plans and work closely with the test engineering team to characterize fabricated devices, analyze laboratory measurements, debug silicon, and correlate measured performance with simulation results.
Mentor junior engineers and provide technical leadership on ASIC development projects.
Prepare technical documentation and contribute to proposals, publications, technical reports, patents, and presentations at internal meetings and scientific conferences.
Evaluate and adopt emerging semiconductor technologies, circuit architectures, and design methodologies to support future ASIC developments.
Perform other duties as assigned.
Perform all work in accordance with laboratory environmental, health, and safety policies and procedures.