Senior Architect - Data Processing Systems, Analytics and Data Intelligence

NVIDIA•Us, CA

6d•$184,000 - $356,500

About The Position

NVIDIA is hiring a Senior Architect in Data Processing Systems for Analytics and Data Intelligence (ADI) to define and improve hardware and software architectures for diverse data-processing workloads. The role focuses on delivering performance at scale using NVIDIA's accelerated data-processing platform, which combines CPUs, GPUs, high-bandwidth networking, and other technologies. The architect will co-design future platforms, incorporate customer and partner insights into roadmaps and reference architectures, optimize performance across the full stack, and use production workload analysis to identify architectural opportunities. The position also works with internal architecture and engineering teams to shape hardware features and make complex system design trade-offs. The role requires a master's or PhD in a relevant engineering or computer science field, or equivalent experience, and at least eight years of relevant experience. The successful candidate will bring deep expertise in one or more areas such as data-processing systems, accelerated computing, high-performance I/O, CPU/GPU architecture, or large-scale performance analysis. NVIDIA lists GPU-accelerated data processing, structured data engines or vector databases, mathematical optimization, and network or storage architecture as distinguishing experience. The base salary range is $184,000–$287,500 for Level 4 and $224,000–$356,500 for Level 5. The role is also eligible for equity and benefits. Applications will be accepted at least until October 20, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in recruiting and is an equal opportunity employer committed to an inclusive work environment.

Requirements

Master's or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related field, or equivalent experience.
At least 8 years of experience in distributed data platforms, databases, systems engineering, performance architecture, accelerated computing, or hardware/software co-design.
Extensive knowledge in one or more of the following: data-processing systems (databases, query engines, or vector search), accelerated computing, high-performance I/O, CPU/GPU architecture, or large-scale performance analysis.
Ability to translate sophisticated system analysis into clear, actionable recommendations for silicon architects, software engineers, and executive leadership.
Ability to work across matrixed organizations to drive alignment and deliver results.

Nice To Haves

Experience evaluating system-level trade-offs involving compute, I/O provisioning, memory subsystem development, network topology, and storage tiering across diverse workloads.
Hands-on experience with GPU-accelerated data processing, such as cuDF, RAPIDS, cuVS, or CUDA.
Deep familiarity with structured data engines and/or vector database systems.
Experience with mathematical optimization solvers and understanding of optimization fundamentals.
Background in network or storage architecture.

Responsibilities

Co-design future architectures for NVIDIA data-processing platforms, targeting performance, efficiency, and cost.
Engage with end users, open-source communities, independent software vendors, storage partners, and cloud service providers to incorporate customer insights into roadmaps and reference architectures.
Drive full-stack performance optimization, from CUDA kernels and accelerated libraries to system-level I/O, shuffle, compression, and data movement.
Collaborate with CPU, GPU, and platform architects to shape hardware features through workload analysis and hardware-software co-design.
Partner with internal teams to build and apply constraint-based frameworks and optimization solvers for complex design trade-offs across competing metrics.
Develop benchmarking frameworks to evaluate performance sensitivities and guide hardware-software co-optimization.
Analyze production workloads across the data-processing landscape to identify compute motifs, I/O patterns, and optimization opportunities across the platform stack.