Senior Applied Power Architect - GPU

NVIDIA•Austin, TX

1d•$168,000 - $310,500

About The Position

NVIDIA is a world leader in providing energy-efficient high-performance products, continuously investing in the research and development of hyper-efficient GPU and SOC architectures. We are constantly innovating to improve our ability to deliver exceptional perf/watt solutions across various sectors. The Applied Power Architecture team is seeking a Senior Applied Power Architect – GPU to develop state-of-the-art GPUs for AI, Automotive, GeForce, and Mobile products.

Requirements

MSEE/MSCE, preferably PhD, or equivalent experience with a specialization in low-power-processor architectures.
Solid understanding of energy-efficient system design fundamentals, performance/power modeling, and related tradeoffs from 6+ years of relevant industry experience.
A background in PDN design and good understanding of electrical issues such as Di/Dt, undershoot/overshoot, IR, EM, peak current, analysis/mitigation techniques.
Strong interpersonal and organizational skills.
Ability and desire to work as a great teammate.

Nice To Haves

Exposure and working knowledge of Python and data analysis packages like Pandas, NumPy, PyTorch.
Exposure to lab setup including power measurement equipment such as scope/DAQ.
Ability to analyze board-level power issues like supply voltage, over-current, etc.

Responsibilities

Inventing methodologies, features, and techniques to address electrical/speed/power challenges for NVIDIA's next-generation AI architectures (e.g., Rubin, Feynman).
Driving power management initiatives to optimize power efficiency and performance while managing electrical/thermal and power constraints.
Understanding process characteristics and their impact on Voltage-Frequency (V-F) curves, and analyzing V-F tradeoffs considering Vt choices on power, other metrics, and overall performance.
Investigating multi-die technologies and developing innovative solutions for packaging, interconnect, physical design, electrical, and thermal challenges.
Analyzing peak current, Di/Dt, IR, and EM requirements.
Collaborating closely with ASIC designers, Power Integrity experts, Packaging experts, and Product engineers to understand challenges and formulate solutions.