Senior Application Engineer - Semiconductor Test

Advantest•San Jose, CA
•Onsite

About The Position

Advantest America is seeking a hands-on Semiconductor Test Application Engineer in San Jose, CA, to join their high-caliber application engineering team. This role focuses on advanced semiconductor test solutions for next-generation SoC, high-performance computing, RF, and mixed-signal products, particularly in the rapidly growing field of AI compute and inference. The engineer will be responsible for bringing up, validating, and optimizing advanced SoC devices, working closely with silicon, software, ATE, and customer programs. The position is ideal for experienced ATE, validation, test development, or system-level debug engineers who want to solve complex semiconductor test challenges using lab hardware, customer teams, and Advantest V93000 platforms. The role involves becoming a key technical owner for Advantest SmarTest 8 and V93000-based SoC test solutions, architecting, debugging, and optimizing production-grade test programs for complex devices. Due to the nature of hardware bring-up, lab execution, customer collaboration, and fast-moving ramps, the position requires on-site presence.

Requirements

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related technical discipline.
  • Based in San Jose, CA, with regular on-site work at least three days per week across customer sites, lab environments, and/or the Advantest office.
  • Hands-on experience developing, debugging, or supporting test applications for manufacturing, characterization, validation, or production test.
  • Working knowledge of structural test, scan-based test strategies, memory BIST, logic BIST, high-speed digital I/O, or comparable SoC validation and production-test concepts.
  • Strong skills in Java, C/C++, Python, or similar languages, with the ability to build tools, automate workflows, parse test data, and debug hardware/software interactions.
  • Ability to move between software, hardware, silicon behavior, and customer constraints to diagnose issues and drive practical solutions.

Nice To Haves

  • V93000 and SmarTest 8 experience is highly valued, but other ATE platforms or adjacent semiconductor test systems are also relevant.

Responsibilities

  • Test Program Development: Architect, write, debug, and optimize SoC test programs in modern ATE software environments, including Advantest SmarTest 8, for advanced AI compute, inference, and high-performance semiconductor devices.
  • Silicon Bring-Up and Validation: Support and help drive first-silicon bring-up on V93000 testers, debugging interactions between silicon, system behavior, test content, and the tester environment.
  • Pattern Workflow Engineering: Drive pattern translation, validation, and debug across DFT and tester workflows. Work with STIL, WGL, or comparable pattern sources; support tester bring-up; and collaborate with design and product engineering on emerging virtual test workflows using SmarTest 8 and V93000 environments.
  • Hardware Co-Design and Debug: Collaborate with PCB and hardware teams to specify, validate, and troubleshoot high-density Device Interface Boards (DIBs), including signal integrity, power delivery, and tester-to-device interfaces.
  • Test Time and Automation: Build automation in Python, Java, C++, or similar languages to analyze logs and STDF data, streamline debug, interface with test platforms, improve multi-site efficiency, and accelerate learning loops.

Benefits

  • Hands-On Lab Access: Get direct access to advanced V93000 testers, complex SoC bring-up environments, and lab infrastructure for real customer test challenges.
  • Silicon Valley Impact: Work with leading design, architecture, DFT, and customer engineering teams on AI compute and inference devices where test strategy, debug speed, and production readiness affect time-to-market.
  • Career Growth: Build deep expertise in V93000 and SmarTest 8 while applying your ATE, validation, hardware debug, or automation background to AI compute and inference programs.
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